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Message-Id: <1557401361-3828-1-git-send-email-wanpengli@tencent.com>
Date: Thu, 9 May 2019 19:29:18 +0800
From: Wanpeng Li <kernellwp@...il.com>
To: linux-kernel@...r.kernel.org, kvm@...r.kernel.org
Cc: Paolo Bonzini <pbonzini@...hat.com>,
Radim Krčmář <rkrcmar@...hat.com>
Subject: [PATCH 0/3] KVM: LAPIC: Optimize timer latency further
Advance lapic timer tries to hidden the hypervisor overhead between host
timer fires and the guest awares the timer is fired. However, it just hidden
the time between apic_timer_fn/handle_preemption_timer -> wait_lapic_expire,
instead of the real position of vmentry which is mentioned in the orignial
commit d0659d946be0 ("KVM: x86: add option to advance tscdeadline hrtimer
expiration"). There is 700+ cpu cycles between the end of wait_lapic_expire
and before world switch on my haswell desktop, it will be 2400+ cycles if
vmentry_l1d_flush is tuned to always.
This patchset tries to narrow the last gap, it measures the time between
the end of wait_lapic_expire and before world switch, we take this
time into consideration when busy waiting, otherwise, the guest still
awares the latency between wait_lapic_expire and world switch, we also
consider this when adaptively tuning the timer advancement. The patch
can reduce 50% latency (~1600+ cycles to ~800+ cycles on a haswell
desktop) for kvm-unit-tests/tscdeadline_latency when testing busy waits.
Wanpeng Li (3):
KVM: LAPIC: Extract adaptive tune timer advancement logic
KVM: LAPIC: Fix lapic_timer_advance_ns parameter overflow
KVM: LAPIC: Optimize timer latency further
arch/x86/kvm/lapic.c | 78 ++++++++++++++++++++++++++++++++++----------------
arch/x86/kvm/lapic.h | 8 ++++++
arch/x86/kvm/vmx/vmx.c | 2 ++
arch/x86/kvm/x86.c | 2 +-
4 files changed, 64 insertions(+), 26 deletions(-)
--
2.7.4
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