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Message-Id: <20190510101536.6724-5-chris.packham@alliedtelesis.co.nz>
Date: Fri, 10 May 2019 22:15:31 +1200
From: Chris Packham <chris.packham@...iedtelesis.co.nz>
To: linux@...linux.org.uk, bp@...en8.de, mark.rutland@....com,
robh+dt@...nel.org, mchehab@...nel.org, james.morse@....com,
jlu@...gutronix.de, gregory.clement@...tlin.com
Cc: linux-arm-kernel@...ts.infradead.org, linux-edac@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Chris Packham <chris.packham@...iedtelesis.co.nz>
Subject: [PATCH v8 4/9] ARM: l2x0: support parity-enable/disable on aurora
The aurora cache on the Marvell Armada-XP SoC supports the same tag
parity features as the other l2x0 cache implementations.
Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
[jlu@...gutronix.de: use aurora specific define AURORA_ACR_PARITY_EN]
Signed-off-by: Jan Luebbe <jlu@...gutronix.de>
---
arch/arm/mm/cache-l2x0.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 7d2d2a3c67d0..b70bee74750d 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -1505,6 +1505,13 @@ static void __init aurora_of_parse(const struct device_node *np,
mask |= AURORA_ACR_FORCE_WRITE_POLICY_MASK;
}
+ if (of_property_read_bool(np, "arm,parity-enable")) {
+ mask |= AURORA_ACR_PARITY_EN;
+ val |= AURORA_ACR_PARITY_EN;
+ } else if (of_property_read_bool(np, "arm,parity-disable")) {
+ mask |= AURORA_ACR_PARITY_EN;
+ }
+
*aux_val &= ~mask;
*aux_val |= val;
*aux_mask &= ~mask;
--
2.21.0
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