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Message-ID: <c9b4759e-e15b-9c5d-63d0-9db06a4c361a@partner.samsung.com>
Date:   Fri, 10 May 2019 15:12:52 +0200
From:   Lukasz Luba <l.luba@...tner.samsung.com>
To:     Rob Herring <robh@...nel.org>
Cc:     Krzysztof Kozlowski <krzk@...nel.org>, devicetree@...r.kernel.org,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "open list:THERMAL" <linux-pm@...r.kernel.org>,
        "linux-samsung-soc@...r.kernel.org" 
        <linux-samsung-soc@...r.kernel.org>,
        Bartłomiej Żołnierkiewicz 
        <b.zolnierkie@...sung.com>, Kukjin Kim <kgene@...nel.org>,
        Chanwoo Choi <cw00.choi@...sung.com>,
        Kyungmin Park <kyungmin.park@...sung.com>,
        Marek Szyprowski <m.szyprowski@...sung.com>,
        Sylwester Nawrocki <s.nawrocki@...sung.com>,
        MyungJoo Ham <myungjoo.ham@...sung.com>,
        Kees Cook <keescook@...omium.org>,
        Tony Lindgren <tony@...mide.com>,
        Joerg Roedel <jroedel@...e.de>,
        Thierry Reding <treding@...dia.com>,
        Dmitry Osipenko <digetx@...il.com>, willy.mh.wolff.ml@...il.com
Subject: Re: [PATCH v7 07/13] dt-bindings: memory-controllers: add
 Exynos5422 DMC device description

Hi Rob,

On 5/8/19 10:35 PM, Rob Herring wrote:
> On Wed, May 8, 2019 at 4:45 AM Lukasz Luba <l.luba@...tner.samsung.com> wrote:
>>
>>
>> On 5/8/19 9:19 AM, Krzysztof Kozlowski wrote:
>>> On Tue, 7 May 2019 at 19:04, Rob Herring <robh@...nel.org> wrote:
>>>>> +- devfreq-events : phandles of the PPMU events used by the controller.
>>>>> +- samsung,syscon-chipid : phandle of the ChipID used by the controller.
>>>>> +- samsung,syscon-clk : phandle of the clock register set used by the controller.
>>>>
>>>> Looks like a hack. Can't you get this from the clocks property? What is
>>>> this for?
>>>
>>> Hi Rob,
>>>
>>> Lukasz uses these two syscon regmaps to read certain registers. For
>>> chipid he reads it to check the size of attached memory (only 2 GB
>>> version is supported). This indeed looks like a hack. However the
>>> second regmap (clk) is needed to get the timing data from registers
>>> from DMC clock driver address space. These are registers with memory
>>> timing so their data is not exposed anyway in common clk framework.
> 
> Okay, please just explain what your accessing. Consider adding the
> offset as a cell in case stuff moves around on another chip.
Good point. I will also have to regmap the registers and not take from
'clock' device.
> 
>>>
>>> Best regards,
>>> Krzysztof
>>
>> Thank you Krzysztof for a fast response. I have also responded to Rob.
>> I wouldn't call accessing chipid registers as a hack, though. The DMC
>> registers do not contain information about the memory chip since it is
>> in phase of production the board not the chip. Thus, chipid regs (which
>> loads from e-fuses) are best place to put information about memory
>> type/size.
> 
> For efuses, we have a binding (nvmem). Maybe you should use it.
I don't know about the design of a planned 'chipid' driver, which going
to be sent to LKML in near future. Thank you for this information,
I will talk with Bartek.

Regards,
Lukasz
> 
> Rob
> 
> 

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