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Date:   Sat, 11 May 2019 19:25:58 +0200
From:   Jerome Brunet <jbrunet@...libre.com>
To:     Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        Kevin Hilman <khilman@...libre.com>
Cc:     linux-amlogic@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 5/5] arm64: dts: meson: sei510: add network support

On Sat, 2019-05-11 at 19:16 +0200, Martin Blumenstingl wrote:
> Hi Kevin,
> 
> On Sat, May 11, 2019 at 12:45 AM Kevin Hilman <khilman@...libre.com> wrote:
> > Jerome Brunet <jbrunet@...libre.com> writes:
> > 
> > > Enable the network interface of the SEI510 which use the internal PHY.
> > > 
> > > Signed-off-by: Jerome Brunet <jbrunet@...libre.com>
> > 
> > I tried testing this series on SEI510, but I must still be missing some
> > defconfig options, as the default defconfig doesn't lead to a working
> > interface.
> > 
> > 
> > I tried adding this kconfig fragment[1], and the dwmac probes/inits but
> > I must still be missing something, as the dwmac is still failing to find
> > a PHY.  Boot log: https://termbin.com/ivf3
> > 
> > I have the same result testing on the u200.
> I wonder if we're simply missing the pinctrl definitions in the ethmac node:
>   pinctrl-0 = <&eth_rmii_pins>;
>   pinctrl-names = "default";
> 
> I don't know how the SoC works internally but I am assuming that the
> MDIO pins are routed to the "internal PHY" (within the chip).
> also we need the eth_rmii_pins anyways for the RXD/TXD pins which are
> connected to the physical Ethernet port on the board.
> bonus question: while writing this email I'm surprised to see that on
> GXL we don't use the rmii pins anywhere, why is Ethernet working fine
> there?

AFAIK, the pinmux is for the external pad Martin
The internal phy does not use those pads.

> 
> 
> Martin


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