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Message-ID: <495b70a3-0232-343b-9081-56869415986f@amd.com>
Date:   Sun, 12 May 2019 17:04:23 +0000
From:   "S-k, Shyam-sundar" <Shyam-sundar.S-k@....com>
To:     Adrian Hunter <adrian.hunter@...el.com>,
        Raul E Rangel <rrangel@...omium.org>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
        "Agrawal, Nitesh-kumar" <Nitesh-kumar.Agrawal@....com>
CC:     "djkurtz@...omium.org" <djkurtz@...omium.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        "Sen, Pankaj" <Pankaj.Sen@....com>,
        "Shah, Nehal-bakulchandra" <Nehal-bakulchandra.Shah@....com>
Subject: Re: [RFC PATCH 2/2] mmc: sdhci: Quirk for AMD SDHC Device 0x7906

On 5/2/2019 12:02 PM, Adrian Hunter wrote:
> Cc: some AMD people
>
> On 1/05/19 8:54 PM, Raul E Rangel wrote:
>> AMD SDHC 0x7906 requires a hard reset to clear all internal state.
>> Otherwise it can get into a bad state where the DATA lines are always
>> read as zeros.
>>
>> This change requires firmware that can transition the device into
>> D3Cold for it to work correctly. If the firmware does not support
>> transitioning to D3Cold then the power state transitions are a no-op.
>>
>> Signed-off-by: Raul E Rangel <rrangel@...omium.org>
Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@....com>

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