linux-kernel - Re: [PATCH 9/9] perf/x86: Use update attribute groups for default attributes

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20190513093545.GM2623@hirez.programming.kicks-ass.net>
Date:   Mon, 13 May 2019 11:35:45 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     Jiri Olsa <jolsa@...nel.org>
Cc:     Arnaldo Carvalho de Melo <acme@...nel.org>,
        lkml <linux-kernel@...r.kernel.org>,
        Ingo Molnar <mingo@...nel.org>,
        Namhyung Kim <namhyung@...nel.org>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Andi Kleen <ak@...ux.intel.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Subject: Re: [PATCH 9/9] perf/x86: Use update attribute groups for default
 attributes

On Sun, May 12, 2019 at 05:55:18PM +0200, Jiri Olsa wrote:
> Using the new pmu::update_attrs attribute group for default
> attributes - freeze_on_smi, allow_tsx_force_abort.
> 
> Signed-off-by: Jiri Olsa <jolsa@...nel.org>

> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
> index 7db858c3bbec..e721be25abfb 100644
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -3888,8 +3888,6 @@ static __initconst const struct x86_pmu core_pmu = {
>  	.check_period		= intel_pmu_check_period,
>  };
>  
> -static struct attribute *intel_pmu_attrs[];
> -
>  static __initconst const struct x86_pmu intel_pmu = {
>  	.name			= "Intel",
>  	.handle_irq		= intel_pmu_handle_irq,
> @@ -3921,8 +3919,6 @@ static __initconst const struct x86_pmu intel_pmu = {
>  	.format_attrs		= intel_arch3_formats_attr,
>  	.events_sysfs_show	= intel_event_sysfs_show,
>  
> -	.attrs			= intel_pmu_attrs,
> -
>  	.cpu_prepare		= intel_pmu_cpu_prepare,
>  	.cpu_starting		= intel_pmu_cpu_starting,
>  	.cpu_dying		= intel_pmu_cpu_dying,
> @@ -4449,6 +4445,10 @@ static struct attribute_group group_format_extra_skl = {
>  	.is_visible = exra_is_visible,
>  };
>  
> +static struct attribute_group group_default = {
> +	.attrs = intel_pmu_attrs,
> +};
> +
>  static const struct attribute_group *attr_update[] = {
>  	&group_events_td,
>  	&group_events_mem,
> @@ -4457,6 +4457,7 @@ static const struct attribute_group *attr_update[] = {
>  	&group_caps_lbr,
>  	&group_format_extra,
>  	&group_format_extra_skl,
> +	&group_default,
>  	NULL,
>  };


Ah, I would have expected to see this somewhat dodgy hack go away too:

	static struct attribute *intel_pmu_attrs[] = {
		&dev_attr_freeze_on_smi.attr,
		NULL, /* &dev_attr_allow_tsx_force_abort.attr.attr */
		NULL,
	};

	intel_pmu_attrs[1] = &dev_attr_allow_tsx_force_abort.attr;


That just begs for a .visislbe too, right?