linux-kernel - Re: [PATCH v3 4/6] dt-bindings: soc/fsl: qe: document new fsl,qe-snums binding

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Date:   Mon, 13 May 2019 11:39:01 +0000
From:   Joakim Tjernlund <Joakim.Tjernlund@...inera.com>
To:     "rasmus.villemoes@...vas.dk" <rasmus.villemoes@...vas.dk>,
        "leoyang.li@....com" <leoyang.li@....com>,
        "qiang.zhao@....com" <qiang.zhao@....com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
        "Rasmus.Villemoes@...vas.se" <Rasmus.Villemoes@...vas.se>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "christophe.leroy@....fr" <christophe.leroy@....fr>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "oss@...error.net" <oss@...error.net>
Subject: Re: [PATCH v3 4/6] dt-bindings: soc/fsl: qe: document new
 fsl,qe-snums binding

On Mon, 2019-05-13 at 11:14 +0000, Rasmus Villemoes wrote:
> CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe.
> 
> 
> Reading table 4-30, and its footnotes, of the QUICC Engine Block
> Reference Manual shows that the set of snum _values_ is not
> necessarily just a function of the _number_ of snums, as given in the
> fsl,qe-num-snums property.
> 
> As an alternative, to make it easier to add support for other variants
> of the QUICC engine IP, this introduces a new binding fsl,qe-snums,
> which automatically encodes both the number of snums and the actual
> values to use.
> 
> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@...vas.dk>
> ---
> Rob, thanks for the review of v2. However, since I moved the example
> from the commit log to the binding (per Joakim's request), I didn't

Thanks, looks good now.

> add a Reviewed-by tag for this revision.
> 
>  .../devicetree/bindings/soc/fsl/cpm_qe/qe.txt       | 13 ++++++++++++-
>  1 file changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
> index d7afaff5faff..05ec2a838c54 100644
> --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
> +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
> @@ -18,7 +18,8 @@ Required properties:
>  - reg : offset and length of the device registers.
>  - bus-frequency : the clock frequency for QUICC Engine.
>  - fsl,qe-num-riscs: define how many RISC engines the QE has.
> -- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use for the
> +- fsl,qe-snums: This property has to be specified as '/bits/ 8' value,
> +  defining the array of serial number (SNUM) values for the virtual
>    threads.
> 
>  Optional properties:
> @@ -34,6 +35,11 @@ Recommended properties
>  - brg-frequency : the internal clock source frequency for baud-rate
>    generators in Hz.
> 
> +Deprecated properties
> +- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use
> +  for the threads. Use fsl,qe-snums instead to not only specify the
> +  number of snums, but also their values.
> +
>  Example:
>       qe@...00000 {
>         #address-cells = <1>;
> @@ -44,6 +50,11 @@ Example:
>         reg = <e0100000 480>;
>         brg-frequency = <0>;
>         bus-frequency = <179A7B00>;
> +       fsl,qe-snums = /bits/ 8 <
> +               0x04 0x05 0x0C 0x0D 0x14 0x15 0x1C 0x1D
> +               0x24 0x25 0x2C 0x2D 0x34 0x35 0x88 0x89
> +               0x98 0x99 0xA8 0xA9 0xB8 0xB9 0xC8 0xC9
> +               0xD8 0xD9 0xE8 0xE9>;
>       }
> 
>  * Multi-User RAM (MURAM)
> --
> 2.20.1
>