linux-kernel - Re: [PATCH] perf vendor events arm64: Map Brahma-B53 CPUID to cortex-a53 events

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 13 May 2019 11:04:49 -0700
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Arnaldo Carvalho de Melo <arnaldo.melo@...il.com>
Cc:     Will Deacon <will.deacon@....com>, Jiri Olsa <jolsa@...hat.com>,
        linux-kernel@...r.kernel.org,
        bcm-kernel-feedback-list@...adcom.com,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Namhyung Kim <namhyung@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        "moderated list:ARM PMU PROFILING AND DEBUGGING" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH] perf vendor events arm64: Map Brahma-B53 CPUID to
 cortex-a53 events

On 5/2/19 4:57 PM, Arnaldo Carvalho de Melo wrote:
> Em Thu, May 02, 2019 at 02:28:02PM -0700, Florian Fainelli escreveu:
>> On 4/8/19 9:26 AM, Will Deacon wrote:
>>> On Fri, Apr 05, 2019 at 09:50:47AM -0700, Florian Fainelli wrote:
>>>> Broadcom's Brahma-B53 CPUs support the same type of events that the
>>>> Cortex-A53 supports, recognize its CPUID and map it to the cortex-a53
>>>> events.
>>>>
>>>> Signed-off-by: Florian Fainelli <f.fainelli@...il.com>
>>>> ---
>>>>  tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
>>>>  1 file changed, 1 insertion(+)
>>>>
>>>> diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>> index 59cd8604b0bd..e97c12484bc6 100644
>>>> --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>> +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>> @@ -13,6 +13,7 @@
>>>>  #
>>>>  #Family-model,Version,Filename,EventType
>>>>  0x00000000410fd03[[:xdigit:]],v1,arm/cortex-a53,core
>>>> +0x00000000420f100[[:xdigit:]],v1,arm/cortex-a53,core
>>>>  0x00000000420f5160,v1,cavium/thunderx2,core
>>>>  0x00000000430f0af0,v1,cavium/thunderx2,core
>>>>  0x00000000480fd010,v1,hisilicon/hip08,core
>>>
>>> Acked-by: Will Deacon <will.deacon@....com>
>>
>> Thanks! Can this be picked up?
> 
> Thanks, applied to perf/core.

Thanks, I don't seem to be able to find it being pushed out to that tree
or in linux-next.
-- 
Florian