linux-kernel - Re: [PATCH v7 00/13] selftests/resctrl: Add resctrl selftest

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <bbc6843c-74c6-9159-9746-ec7ec68c602b@arm.com>
Date:   Tue, 14 May 2019 18:20:13 +0100
From:   James Morse <james.morse@....com>
To:     "Yu, Fenghua" <fenghua.yu@...el.com>
Cc:     Andre Przywara <andre.przywara@....com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        H Peter Anvin <hpa@...or.com>,
        "Luck, Tony" <tony.luck@...el.com>,
        "Chatre, Reinette" <reinette.chatre@...el.com>,
        "Shankar, Ravi V" <ravi.v.shankar@...el.com>,
        "Shen, Xiaochen" <xiaochen.shen@...el.com>,
        "Pathan, Arshiya Hayatkhan" <arshiya.hayatkhan.pathan@...el.com>,
        "Prakhya, Sai Praneeth" <sai.praneeth.prakhya@...el.com>,
        Babu Moger <babu.moger@....com>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v7 00/13] selftests/resctrl: Add resctrl selftest

Hi Fenghua,

On 10/05/2019 20:20, Yu, Fenghua wrote:
>> On Friday, May 10, 2019 10:36 AM
>> Andre Przywara [mailto:andre.przywara@....com] wrote:
>> On Sat,  9 Feb 2019 18:50:29 -0800
>> Fenghua Yu <fenghua.yu@...el.com> wrote:

>>> With more and more resctrl features are being added by Intel, AMD and
>>> ARM, a test tool is becoming more and more useful to validate that
>>> both hardware and software functionalities work as expected.
>>
>> That's very much appreciated! We decided to use that tool here to detect
>> regressions in James' upcoming resctrl rework series. While doing so we
>> spotted some shortcomings:

>> - There is some unconditional x86 inline assembly which obviously breaks
>> the build on ARM.
> 
> Will fix this as much as possible.
> 
> BTW, does ARM support perf imc_count events which are used in CAT tests?

I've never heard of these. git-grep says its a powerpc pmu...

(after a quick chat with Andre), is this a cache-miss counter?
If so, its a bit murky, (and beware, I don't know much about perf).
The arch code's armv8_pmu has a 'PERF_COUNT_HW_CACHE_MISSES' map entry, so yes...
... but if we're measuring this on a cache outside the CPU, we'd need an 'uncore' pmu
driver, so it would depend on what the manufacturer implemented.


I should admit that I'm expecting this selftest to test resctrl, and not depend on a lot
else. Couldn't it use the llc_occupancy value, 50% bitmap gives ~50% lower occupancy. Or
(some combination of) the mbm byte counters, (which would require a seeky workload to
cause repeat re-fills of the same line)...


Thanks,

James