linux-kernel - Re: [PATCH V5 1/4] spi: tegra114: add support for gpio based CS

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <ec2e9dab-e299-0f73-090c-e060b4683361@nvidia.com>
Date:   Tue, 14 May 2019 18:31:17 +0100
From:   Jon Hunter <jonathanh@...dia.com>
To:     Sowjanya Komatineni <skomatineni@...dia.com>,
        "thierry.reding@...il.com" <thierry.reding@...il.com>,
        Laxman Dewangan <ldewangan@...dia.com>,
        "broonie@...nel.org" <broonie@...nel.org>,
        Krishna Yarlagadda <kyarlagadda@...dia.com>
CC:     "linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-spi@...r.kernel.org" <linux-spi@...r.kernel.org>
Subject: Re: [PATCH V5 1/4] spi: tegra114: add support for gpio based CS


On 14/05/2019 18:18, Sowjanya Komatineni wrote:
>> Subject: Re: [PATCH V5 1/4] spi: tegra114: add support for gpio based CS
> 
>> On 14/05/2019 06:03, Sowjanya Komatineni wrote:
>>> This patch adds support for GPIO based CS control through SPI core 
>>> function spi_set_cs.
>>>
>>> Signed-off-by: Sowjanya Komatineni <skomatineni@...dia.com>
>> Can you elaborate on the use-case where this is needed? I am curious what platforms are using this and why they would not use the dedicated CS signals.
>>
>> Cheers
>> Jon
> 
> Tegra SPI doesn’t support inter byte delay directly to meet some SPI slave requirements.
> So we use GPIO control CS in parallel with a dummy HW CS and use inactive cycles delay of SPI controller to mimic inter byte delay.
> 
> Currently we don’t have specific SPI slave on upstream supported platforms but considering raspberry PI header where SPI I/F is exposed to pins it allows user to connect any SPI slave and this helps for some slaves that need specific inter byte delay.

Maybe add these details to the commit message so that it is clear what
the motivation for this is.

Thanks
Jon

-- 
nvpublic