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Message-Id: <20190515072747.39941-1-xiaowei.bao@nxp.com>
Date: Wed, 15 May 2019 15:27:45 +0800
From: Xiaowei Bao <xiaowei.bao@....com>
To: bhelgaas@...gle.com, robh+dt@...nel.org, mark.rutland@....com,
shawnguo@...nel.org, leoyang.li@....com, kishon@...com,
lorenzo.pieralisi@....com, arnd@...db.de,
gregkh@...uxfoundation.org, minghuan.Lian@....com,
mingkai.hu@....com, roy.zang@....com, kstewart@...uxfoundation.org,
pombredanne@...b.com, shawn.lin@...k-chips.com,
linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linuxppc-dev@...ts.ozlabs.org
Cc: Xiaowei Bao <xiaowei.bao@....com>
Subject: [PATCH 1/3] dt-bindings: pci: layerscape-pci: add compatible strings "fsl,ls1028a-pcie"
Add the PCIe compatible string for LS1028A
Signed-off-by: Xiaowei Bao <xiaowei.bao@....com>
---
.../devicetree/bindings/pci/layerscape-pci.txt | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
index e20ceaa..99a386e 100644
--- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
+++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
@@ -21,6 +21,7 @@ Required properties:
"fsl,ls1046a-pcie"
"fsl,ls1043a-pcie"
"fsl,ls1012a-pcie"
+ "fsl,ls1028a-pcie"
EP mode:
"fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"
- reg: base addresses and lengths of the PCIe controller register blocks.
--
1.7.1
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