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Message-ID: <20190518082227.14507-2-jitao.shi@mediatek.com>
Date: Sat, 18 May 2019 16:22:25 +0800
From: Jitao Shi <jitao.shi@...iatek.com>
To: Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>, <linux-pwm@...r.kernel.org>,
David Airlie <airlied@...ux.ie>,
Matthias Brugger <matthias.bgg@...il.com>
CC: Jitao Shi <jitao.shi@...iatek.com>,
Thierry Reding <treding@...dia.com>,
Ajay Kumar <ajaykumar.rs@...sung.com>,
Inki Dae <inki.dae@...sung.com>,
Rahul Sharma <rahul.sharma@...sung.com>,
Sean Paul <seanpaul@...omium.org>,
Vincent Palatin <vpalatin@...omium.org>,
Andy Yan <andy.yan@...k-chips.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Russell King <rmk+kernel@....linux.org.uk>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<dri-devel@...ts.freedesktop.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<srv_heupstream@...iatek.com>,
Sascha Hauer <kernel@...gutronix.de>,
<yingjoe.chen@...iatek.com>, <eddie.huang@...iatek.com>,
<cawa.cheng@...iatek.com>, <bibby.hsieh@...iatek.com>,
<ck.hu@...iatek.com>, <stonea168@....com>,
Rob Herring <robh@...nel.org>
Subject: [v3 1/3] dt-bindings: display: mediatek: update dsi supported chips
Update device tree binding documentation for the dsi for
Mediatek MT8183 SoCs.
Signed-off-by: Jitao Shi <jitao.shi@...iatek.com>
Acked-by: Rob Herring <robh@...nel.org>
---
.../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
index fadf327c7cdf..bb3dcd2d8571 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
@@ -26,7 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY.
Required properties:
- compatible: "mediatek,<chip>-mipi-tx"
- the supported chips are mt2701 and mt8173.
+ the supported chips are mt2701, mt8173 and mt8183.
- reg: Physical base address and length of the controller's registers
- clocks: PLL reference clock
- clock-output-names: name of the output clock line to the DSI encoder
--
2.21.0
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