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Message-ID: <CAARK3HnG4qg64cc_fjffxGp5EVTLdmWdkMVDx3YvK=coGAuqHw@mail.gmail.com>
Date: Mon, 20 May 2019 20:50:06 +0530
From: Sagar Kadam <sagar.kadam@...ive.com>
To: Andrew Lunn <andrew@...n.ch>
Cc: robh+dt@...nel.org, mark.rutland@....com, peter@...sgaard.com,
Palmer Dabbelt <palmer@...ive.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
linux-i2c@...r.kernel.org, devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 3/3] i2c-ocores: sifive: add polling mode workaround
for FU540-C000 SoC.
On Mon, May 20, 2019 at 8:22 PM Andrew Lunn <andrew@...n.ch> wrote:
>
> On Mon, May 20, 2019 at 07:41:18PM +0530, Sagar Shrikant Kadam wrote:
> > The i2c-ocore driver already has a polling mode interface.But it needs
> > a workaround for FU540 Chipset on HiFive unleashed board (RevA00).
> > There is an erratum in FU540 chip that prevents interrupt driven i2c
> > transfers from working, and also the I2C controller's interrupt bit
> > cannot be cleared if set, due to this the existing i2c polling mode
> > interface added in mainline earlier doesn't work, and CPU stall's
> > infinitely, when-ever i2c transfer is initiated.
> >
> > Ref:previous polling mode support in mainline
> >
> > commit 69c8c0c0efa8 ("i2c: ocores: add polling interface")
> >
> > The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for
> > FU540-COOO SoC.
> >
> > Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@...ive.com>
>
> Much better, thanks.
My pleasure Andrew.
Appreciate your timely review and response.
>
> Reviewed-by: Andrew Lunn <andrew@...n.ch>
>
> Andrew
Thanks,
Sagar
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