lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20190520083323.1decb496@jacob-builder>
Date:   Mon, 20 May 2019 08:33:23 -0700
From:   Jacob Pan <jacob.jun.pan@...ux.intel.com>
To:     LKML <linux-kernel@...r.kernel.org>,
        iommu@...ts.linux-foundation.org, Joerg Roedel <joro@...tes.org>,
        David Woodhouse <dwmw2@...radead.org>
Cc:     Raj Ashok <ashok.raj@...el.com>,
        "Lu Baolu" <baolu.lu@...ux.intel.com>,
        jacob.jun.pan@...ux.intel.com
Subject: Re: [PATCH] iommu/vt-d: Fix bind svm with multiple devices

Hi Joerg & David,

Any feedback on this one? Thanks.

On Wed,  8 May 2019 12:22:46 -0700
Jacob Pan <jacob.jun.pan@...ux.intel.com> wrote:

> If multiple devices try to bind to the same mm/PASID, we need to
> set up first level PASID entries for all the devices. The current
> code does not consider this case which results in failed DMA for
> devices after the first bind.
> 
> Signed-off-by: Jacob Pan <jacob.jun.pan@...ux.intel.com>
> Reported-by: Mike Campin <mike.campin@...el.com>
> ---
>  drivers/iommu/intel-svm.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c
> index 3a4b09a..f3d59d1 100644
> --- a/drivers/iommu/intel-svm.c
> +++ b/drivers/iommu/intel-svm.c
> @@ -357,6 +357,21 @@ int intel_svm_bind_mm(struct device *dev, int
> *pasid, int flags, struct svm_dev_ }
>  
>  		list_add_tail(&svm->list, &global_svm_list);
> +	} else {
> +		/*
> +		 * Binding a new device with existing PASID, need to
> setup
> +		 * the PASID entry.
> +		 */
> +		spin_lock(&iommu->lock);
> +		ret = intel_pasid_setup_first_level(iommu, dev,
> +						mm ? mm->pgd :
> init_mm.pgd,
> +						svm->pasid,
> FLPT_DEFAULT_DID,
> +						mm ? 0 :
> PASID_FLAG_SUPERVISOR_MODE);
> +		spin_unlock(&iommu->lock);
> +		if (ret) {
> +			kfree(sdev);
> +			goto out;
> +		}
>  	}
>  	list_add_rcu(&sdev->list, &svm->devs);
>  

[Jacob Pan]

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ