lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 20 May 2019 12:11:42 -0700
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Kamal Dasu <kdasu.kdev@...il.com>, linux-mtd@...ts.infradead.org
Cc:     bcm-kernel-feedback-list@...adcom.com,
        linux-kernel@...r.kernel.org,
        Brian Norris <computersforpeace@...il.com>,
        Miquel Raynal <miquel.raynal@...tlin.com>,
        Richard Weinberger <richard@....at>,
        David Woodhouse <dwmw2@...radead.org>,
        Marek Vasut <marek.vasut@...il.com>,
        Vignesh Raghavendra <vigneshr@...com>
Subject: Re: [PATCH v2 2/2] mtd: nand: raw: brcmnand: fallback to detected
 ecc-strength, ecc-step-size

On 5/20/19 12:05 PM, Kamal Dasu wrote:
> This change supports nand-ecc-step-size and nand-ecc-strength fields in
> brcmnand DT node to be optional.
> see: Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> 
> If both nand-ecc-strength and nand-ecc-step-size are not specified in
> device tree node for NAND, raw NAND layer does detect ECC information by
> reading ONFI extended parameter page for parts using ONFI >= 2.1.
> In case of non-ONFI NAND parts there could be a nand_id table entry with
> ECC information. If there is valid device tree entry for nand-ecc-strength
> and nand-ecc-step-size fields it still shall override the detected values.
> 
> Signed-off-by: Kamal Dasu <kdasu.kdev@...il.com>
> ---
>  drivers/mtd/nand/raw/brcmnand/brcmnand.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> index ce0b8ff..a4d2057 100644
> --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> @@ -2144,6 +2144,17 @@ static int brcmnand_setup_dev(struct brcmnand_host *host)
>  		return -EINVAL;
>  	}
>  
> +	if (chip->ecc.mode != NAND_ECC_NONE &&
> +	    (!chip->ecc.size || !chip->ecc.strength)) {
> +		if (chip->base.eccreq.step_size && chip->base.eccreq.strength) {
> +			/* use detected ECC parameters */
> +			chip->ecc.size = chip->base.eccreq.step_size;
> +			chip->ecc.strength = chip->base.eccreq.strength;
> +			pr_info("Using ECC step-size %d, strength %d\n",
> +				chip->ecc.size, chip->ecc.strength);

Nit: should not we use dev_info(&host->pdev->dev) for printing the
message in case we have multiple NAND controllers on chip, that way we
can still differentiate them from the prints?
-- 
Florian

Powered by blists - more mailing lists