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Message-ID: <OF5AF00898.3CE87C98-ON48258400.00259B16-48258400.0028A4F5@mxic.com.tw>
Date: Mon, 20 May 2019 15:23:57 +0800
From: masonccyang@...c.com.tw
To: "Sergei Shtylyov" <sergei.shtylyov@...entembedded.com>,
"Geert Uytterhoeven" <geert@...ux-m68k.org>,
"Lee Jones" <lee.jones@...aro.org>
Cc: "Boris Brezillon" <bbrezillon@...nel.org>,
"Mark Brown" <broonie@...nel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"Geert Uytterhoeven" <geert@...ux-m68k.org>,
"Geert Uytterhoeven" <geert+renesas@...der.be>,
"Simon Horman" <horms@...ge.net.au>, juliensu@...c.com.tw,
"Lee Jones" <lee.jones@...aro.org>,
"Linux Kernel Mailing List" <linux-kernel@...r.kernel.org>,
"Linux-Renesas" <linux-renesas-soc@...r.kernel.org>,
"linux-spi" <linux-spi@...r.kernel.org>,
"Marek Vasut" <marek.vasut@...il.com>,
"Mark Rutland" <mark.rutland@....com>,
"Rob Herring" <robh@...nel.org>, zhengxunli@...c.com.tw,
"Miquel Raynal" <miquel.raynal@...tlin.com>
Subject: Re: [PATCH v12 3/3] dt-bindings: mfd: Document Renesas R-Car Gen3 RPC-IF
MFD bindings
Hi Sergei,
> >>> -------------------------------------------------------------->
> >>>
> >>> Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings
> >>> ---------------------------------------------------------
> >>>
> >>> RPC-IF supports both SPI NOR and HyperFlash (CFI-compliant flash)
> >>>
> >>> Required properties:
> >>> - compatible: should be an SoC-specific compatible value, followed
> > by
> >>> "renesas,rcar-gen3-rpc" as a fallback.
> >>> supported SoC-specific values are:
> >>> "renesas,r8a77995-rpc" (R-Car D3)
> >>> - reg: should contain three register areas:
> >>> first for the base address of RPC-IF registers,
> >>
> >> I'd drop "the base address" here.
> >
> > okay.
> >
> >>> second for the direct mapping read mode and
> >>> third for the write buffer area.
> >>> - reg-names: should contain "regs", "dirmap" and "wbuf"
> >>> - clocks: should contain 1 entries for the module's clock
> >>> - clock-names: should contain "rpc"
> >>
> >> I suspect we'd need the RPC/RPCD2 clocks mentioned as well (not
sure
> > yet)...
> >
> > Need it ?
>
> You seem to call clk_get_rate() on the module clock, I doubt that's
> correct topologically...
I think it's correct but just like Geert mentioned that there is no any
patch
in drivers/clk/renesas/r8a77995-cpg-mssr.c adding RPC-related clocks.
I patched dt-bindings/clock/r8a77995-cpg-mssr.h for some simple testing
-#define R8A77995_CLK_RPC 29
-#define R8A77995_CLK_RPCD2 30
+#define R8A77995_CLK_RPC 31
+#define R8A77995_CLK_RPCD2 32
by clk_prepare_enable() & clk_disable_unprepare() with CPG_MOD 917
on D3 draak board, it is working fine.
> >>
> >>> - SPI mode:git
> >>>
> >>> rpc: rpc-if@...00000 {
> >>
> >> The node names should be generic, based on the device class. And
in
> > this
> >> case I'd like to use "spi@...00000" as otherwise dtc keeps bitching
like
> > below:
> >
> > okay, patch to
> >
> > rpc_if: spi@<...>
>
> That, or just keep the node label.
okay.
> >>> - HF mode:
> >>> rpc: rpc-if@...00000 {
> >>
> >> Again, spi@<...>.
> >
> > what about rpc_if: hf@<...>
>
> Can't change the node name, as it's declared in the .dtsi files, not
*.dts
> ones. And "spi" works for the HF case as well -- no complaints from dtc.
:-)
okay,
Patch DTS to
===============================================================>
+Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings
+---------------------------------------------------------
+
+RPC-IF supports both SPI NOR and HyperFlash (CFI-compliant flash)
+
+Required properties:
+- compatible: should be an SoC-specific compatible value, followed by
+ "renesas,rcar-gen3-rpc" as a fallback.
+ supported SoC-specific values are:
+ "renesas,r8a77995-rpc" (R-Car
D3)
+- reg: should contain three register areas:
+ first for RPC-IF registers,
+ second for the direct mapping read mode and
+ third for the write buffer area.
+- reg-names: should contain "regs", "dirmap" and "wbuf"
+- clocks: should contain 1 entries for the module's clock
+- clock-names: should contain "rpc"
+- power-domains: should contain system-controller(sysc) for
power-domain-cell
+- resets: should contain clock pulse generator(cpg) for reset-cell,
+ power-domain-cell and clock-cell
+- #address-cells: should be 1
+- #size-cells: should be 0
+
+Example:
+- SPI mode:
+
+ rpc: spi@...00000 {
+ compatible = "renesas,r8a77995-rpc",
"renesas,rcar-gen3-rpc";
+ reg = <0 0xee200000 0 0x200>, <0
0x08000000 0 0x4000000>,
+ <0 0xee208000 0 0x100>;
+ reg-names = "regs", "dirmap", "wbuf";
+ clocks = <&cpg CPG_MOD 917>;
+ clock-names = "rpc";
+ power-domains = <&sysc
R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible =
"jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency =
<40000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ };
+ };
+
+- HF mode:
+ rpc: spi@...00000 {
+ compatible = "renesas,r8a77995-rpc",
"renesas,rcar-gen3-rpc";
+ reg = <0 0xee200000 0 0x200>, <0
0x08000000 0 0x4000000>,
+ <0 0xee208000 0 0x100>;
+ reg-names = "regs", "dirmap", "wbuf";
+ clocks = <&cpg CPG_MOD 917>;
+ clock-names = "rpc";
+ power-domains = <&sysc
R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible =
"cypress,hyperflash", "cfi-flash";
+ reg = <0>;
+ };
+ };
===============================================================<
thanks & best regards,
Mason
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