[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20190521043009.GK15118@vkoul-mobl>
Date: Tue, 21 May 2019 10:00:09 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Paul Cercueil <paul@...pouillou.net>
Cc: Dan Williams <dan.j.williams@...el.com>, od@...c.me,
dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] dmaengine: jz4780: Fix transfers being ACKed too soon
On 04-05-19, 23:37, Paul Cercueil wrote:
> When a multi-descriptor DMA transfer is in progress, the "IRQ pending"
> flag will apparently be set for that channel as soon as the last
> descriptor loads, way before the IRQ actually happens. This behaviour
> has been observed on the JZ4725B, but maybe other SoCs are affected.
>
> In the case where another DMA transfer is running into completion on a
> separate channel, the IRQ handler would then run the completion handler
> for our previous channel even if the transfer didn't actually finish.
>
> Fix this by checking in the completion handler that we're indeed done;
> if not the interrupted DMA transfer will simply be resumed.
Applied, thanks
--
~Vinod
Powered by blists - more mailing lists