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Message-ID: <20190521081001.zjq3gnlvyuyexz6m@flea>
Date: Tue, 21 May 2019 10:10:01 +0200
From: Maxime Ripard <maxime.ripard@...tlin.com>
To: Michael Nazzareno Trimarchi <michael@...rulasolutions.com>
Cc: Jagan Teki <jagan@...rulasolutions.com>,
Chen-Yu Tsai <wens@...e.org>, Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
devicetree <devicetree@...r.kernel.org>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
LKML <linux-kernel@...r.kernel.org>,
linux-amarula <linux-amarula@...rulasolutions.com>,
linux-sunxi <linux-sunxi@...glegroups.com>
Subject: Re: [PATCH] arm64: dts: allwinner: a64-oceanic-5205-5inmfd: Enable
CAN
On Tue, May 21, 2019 at 08:47:02AM +0200, Michael Nazzareno Trimarchi wrote:
> > > + };
> > > +
> > > };
> > >
> > > &ehci0 {
> > > @@ -77,6 +95,31 @@
> > > status = "okay";
> > > };
> > >
> > > +&pio {
> > > + can_pins: can-pins {
> > > + pins = "PD6", /* RX_BUF1_CAN0 */
> > > + "PD7"; /* RX_BUF0_CAN0 */
> > > + function = "gpio_in";
> > > + };
> > > +};
> >
> > That isn't needed. What are they used for, you're not tying them to
> > anything?
>
> Mux of their function is correct. They are connected in the schematics
> but not used right now.
Then describe the whole thing or don't?
And that's kind of missing my point. If that pin group isn't related
to any device, the pin muxing will not be changed. So that group, in
itself, has strictly no effect.
Moreover, you don't need a pin group in the first place to mux pins in
GPIOs, the GPIO API will make sure that is the case when you request
it.
> I can garantee that kernel wlll always configurred in the right way
> and if I want I can export in userspace
> for debug purpose
Yes, because the API does it, not your change
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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