lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 21 May 2019 17:54:24 +0200
From:   Alexandre Belloni <alexandre.belloni@...tlin.com>
To:     Richard Leitner <richard.leitner@...data.com>
Cc:     a.zummo@...ertech.it, linux-rtc@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/3] rtc: s35390a: clarify INT2 pin output modes

Hello,

This seems good to me but...

On 21/05/2019 16:20:22+0200, Richard Leitner wrote:
> Fix the INT2 mode mask to not include the "TEST" flag. Furthermore
> remove the not needed reversion of bits when parsing the INT2 modes.
> Instead reverse the INT2_MODE defines.
> 
> Additionally mention the flag names from the datasheet for the different
> modes in the comments.
> 
> Signed-off-by: Richard Leitner <richard.leitner@...data.com>
> ---
>  drivers/rtc/rtc-s35390a.c | 16 +++++++---------
>  1 file changed, 7 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/rtc/rtc-s35390a.c b/drivers/rtc/rtc-s35390a.c
> index 3c64dbb08109..6fb6d835b178 100644
> --- a/drivers/rtc/rtc-s35390a.c
> +++ b/drivers/rtc/rtc-s35390a.c
> @@ -45,12 +45,13 @@
>  /* flag for STATUS2 */
>  #define S35390A_FLAG_TEST	0x01
>  
> -#define S35390A_INT2_MODE_MASK		0xF0
> -
> +/* INT2 pin output mode */
> +#define S35390A_INT2_MODE_MASK		0x0E
>  #define S35390A_INT2_MODE_NOINTR	0x00
> -#define S35390A_INT2_MODE_FREQ		0x10
> -#define S35390A_INT2_MODE_ALARM		0x40
> -#define S35390A_INT2_MODE_PMIN_EDG	0x20
> +#define S35390A_INT2_MODE_ALARM		0x02 /* INT2AE */
> +#define S35390A_INT2_MODE_PMIN_EDG	0x04 /* INT2ME */
> +#define S35390A_INT2_MODE_FREQ		0x08 /* INT2FE */
> +#define S35390A_INT2_MODE_PMIN		0x0C /* INT2ME | INT2FE */
>  

While you are at it you may as well use BIT().

>  static const struct i2c_device_id s35390a_id[] = {
>  	{ "s35390a", 0 },
> @@ -303,9 +304,6 @@ static int s35390a_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
>  	else
>  		sts = S35390A_INT2_MODE_NOINTR;
>  
> -	/* This chip expects the bits of each byte to be in reverse order */
> -	sts = bitrev8(sts);
> -
>  	/* set interupt mode*/
>  	err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts));
>  	if (err < 0)
> @@ -343,7 +341,7 @@ static int s35390a_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
>  	if (err < 0)
>  		return err;
>  
> -	if ((bitrev8(sts) & S35390A_INT2_MODE_MASK) != S35390A_INT2_MODE_ALARM) {
> +	if ((sts & S35390A_INT2_MODE_MASK) != S35390A_INT2_MODE_ALARM) {
>  		/*
>  		 * When the alarm isn't enabled, the register to configure
>  		 * the alarm time isn't accessible.
> -- 
> 2.20.1
> 

-- 
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ