lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20190522233335.GA16408@cz.tnic>
Date:   Thu, 23 May 2019 01:33:35 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     Frank van der Linden <fllinden@...zon.com>
Cc:     x86@...nel.org, linux-kernel@...r.kernel.org,
        jiaxun.yang@...goat.com, "Rafael J. Wysocki" <rafael@...nel.org>
Subject: Re: [PATCH] x86/CPU/AMD: don't force the CPB cap when running under
 a hypervisor

On Wed, May 22, 2019 at 10:17:45PM +0000, Frank van der Linden wrote:
> For F17h AMD CPUs, the CPB capability is forcibly set, because some
> versions of that chip incorrectly report that they do not have it.
> 
> However, a hypervisor may filter out the CPB capability, for good
> reasons. For example, KVM currently does not emulate setting the CPB
> bit in MSR_K7_HWCR, and unchecked MSR access errors will be thrown
> when trying to set it as a guest:
> 
> 	unchecked MSR access error: WRMSR to 0xc0010015 (tried to write
>         0x0000000001000011) at rIP: 0xffffffff890638f4
>         (native_write_msr+0x4/0x20)
> 
> 	Call Trace:
> 	boost_set_msr+0x50/0x80 [acpi_cpufreq]
> 	cpuhp_invoke_callback+0x86/0x560
> 	sort_range+0x20/0x20
> 	cpuhp_thread_fun+0xb0/0x110
> 	smpboot_thread_fn+0xef/0x160
> 	kthread+0x113/0x130
> 	kthread_create_worker_on_cpu+0x70/0x70
> 	ret_from_fork+0x35/0x40
> 
> To avoid this issue, don't forcibly set the CPB capability for a CPU
> when running under a hypervisor.
> 
> Signed-off-by: Frank van der Linden <fllinden@...zon.com>
> Fixes: 0237199186e7 ("x86/CPU/AMD: Set the CPB bit unconditionally on F17h")
> ---
>  arch/x86/kernel/cpu/amd.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
> index fb6a64bd765f..ee4d79fa1b19 100644
> --- a/arch/x86/kernel/cpu/amd.c
> +++ b/arch/x86/kernel/cpu/amd.c
> @@ -823,8 +823,11 @@ static void init_amd_zn(struct cpuinfo_x86 *c)
>  {
>  	set_cpu_cap(c, X86_FEATURE_ZEN);
>  
> -	/* Fix erratum 1076: CPB feature bit not being set in CPUID. */
> -	if (!cpu_has(c, X86_FEATURE_CPB))
> +	/*
> +	 * Fix erratum 1076: CPB feature bit not being set in CPUID.
> +	 * Always set it, except when running under a hypervisor.
> +	 */
> +	if (!cpu_has(c, X86_FEATURE_HYPERVISOR) && !cpu_has(c, X86_FEATURE_CPB))
>  		set_cpu_cap(c, X86_FEATURE_CPB);
>  }

I guess...

Acked-by: Borislav Petkov <bp@...e.de>

Btw, it has come up before whether it would be additionally prudent
to replace those *msr calls with their *msr_safe counterparts, in
boost_set_msr() and also check *msr_safe() retvals and exit early there.
Just in case and exactly because of virt.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply. Srsly.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ