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Message-ID: <CA+7wUsxe4DLmAGNnnXZ3UokguMJ0cOGtu=opQpuAPvN_SH4KUw@mail.gmail.com>
Date: Wed, 22 May 2019 11:21:00 +0200
From: Mathieu Malaterre <malat@...ian.org>
To: Paul Cercueil <paul@...pouillou.net>
Cc: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Ralf Baechle <ralf@...ux-mips.org>,
Paul Burton <paul.burton@...s.com>,
James Hogan <jhogan@...nel.org>,
Jonathan Corbet <corbet@....net>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <marc.zyngier@....com>,
Lee Jones <lee.jones@...aro.org>,
LKML <linux-kernel@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>, linux-mips@...r.kernel.org,
linux-doc@...r.kernel.org, linux-clk@...r.kernel.org, od@...c.me
Subject: Re: [PATCH v12 09/13] MIPS: jz4740: Add DTS nodes for the TCU drivers
On Tue, May 21, 2019 at 4:52 PM Paul Cercueil <paul@...pouillou.net> wrote:
>
> Add DTS nodes for the JZ4780, JZ4770 and JZ4740 devicetree files.
>
> Signed-off-by: Paul Cercueil <paul@...pouillou.net>
> ---
>
> Notes:
> v5: New patch
>
> v6: Fix register lengths in watchdog/pwm nodes
>
> v7: No change
>
> v8: - Fix wrong start address for PWM node
> - Add system timer and clocksource sub-nodes
>
> v9: Drop timer and clocksource sub-nodes
>
> v10-v11: No change
>
> v12: Drop PWM/watchdog/OST sub-nodes, for now.
>
> arch/mips/boot/dts/ingenic/jz4740.dtsi | 22 ++++++++++++++++++++++
> arch/mips/boot/dts/ingenic/jz4770.dtsi | 21 +++++++++++++++++++++
> arch/mips/boot/dts/ingenic/jz4780.dtsi | 21 +++++++++++++++++++++
> 3 files changed, 64 insertions(+)
>
> diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi
> index 2beb78a62b7d..807d9702d4cf 100644
> --- a/arch/mips/boot/dts/ingenic/jz4740.dtsi
> +++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi
> @@ -53,6 +53,28 @@
> clock-names = "rtc";
> };
>
> + tcu: timer@...02000 {
> + compatible = "ingenic,jz4740-tcu";
> + reg = <0x10002000 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x10002000 0x1000>;
> +
> + #clock-cells = <1>;
> +
> + clocks = <&cgu JZ4740_CLK_RTC
> + &cgu JZ4740_CLK_EXT
> + &cgu JZ4740_CLK_PCLK
> + &cgu JZ4740_CLK_TCU>;
> + clock-names = "rtc", "ext", "pclk", "tcu";
> +
> + interrupt-controller;
> + #interrupt-cells = <1>;
> +
> + interrupt-parent = <&intc>;
> + interrupts = <23 22 21>;
> + };
> +
> rtc_dev: rtc@...03000 {
> compatible = "ingenic,jz4740-rtc";
> reg = <0x10003000 0x40>;
> diff --git a/arch/mips/boot/dts/ingenic/jz4770.dtsi b/arch/mips/boot/dts/ingenic/jz4770.dtsi
> index 49ede6c14ff3..70932fd90902 100644
> --- a/arch/mips/boot/dts/ingenic/jz4770.dtsi
> +++ b/arch/mips/boot/dts/ingenic/jz4770.dtsi
> @@ -46,6 +46,27 @@
> #clock-cells = <1>;
> };
>
> + tcu: timer@...02000 {
> + compatible = "ingenic,jz4770-tcu";
> + reg = <0x10002000 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x10002000 0x1000>;
> +
> + #clock-cells = <1>;
> +
> + clocks = <&cgu JZ4770_CLK_RTC
> + &cgu JZ4770_CLK_EXT
> + &cgu JZ4770_CLK_PCLK>;
> + clock-names = "rtc", "ext", "pclk";
> +
> + interrupt-controller;
> + #interrupt-cells = <1>;
> +
> + interrupt-parent = <&intc>;
> + interrupts = <27 26 25>;
> + };
> +
> pinctrl: pin-controller@...10000 {
> compatible = "ingenic,jz4770-pinctrl";
> reg = <0x10010000 0x600>;
> diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi
> index b03cdec56de9..495082ce7fc5 100644
> --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
> +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
> @@ -46,6 +46,27 @@
> #clock-cells = <1>;
> };
>
> + tcu: timer@...02000 {
With W=1, I see:
../arch/mips/boot/dts/ingenic/jz4780.dtsi:64.22-83.4: Warning
(unique_unit_address): /timer@...02000: duplicate unit-address (also
used in node /watchdog@...0
2000)
> + compatible = "ingenic,jz4770-tcu";
> + reg = <0x10002000 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x10002000 0x1000>;
> +
> + #clock-cells = <1>;
> +
> + clocks = <&cgu JZ4780_CLK_RTCLK
> + &cgu JZ4780_CLK_EXCLK
> + &cgu JZ4780_CLK_PCLK>;
> + clock-names = "rtc", "ext", "pclk";
> +
> + interrupt-controller;
> + #interrupt-cells = <1>;
> +
> + interrupt-parent = <&intc>;
> + interrupts = <27 26 25>;
> + };
> +
> rtc_dev: rtc@...03000 {
> compatible = "ingenic,jz4780-rtc";
> reg = <0x10003000 0x4c>;
> --
> 2.21.0.593.g511ec345e18
>
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