linux-kernel - Re: [PATCH 3/3] arm64: dts: imx8mq: add clock for SNVS RTC node

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Date:   Thu, 23 May 2019 09:02:44 +0800
From:   Shawn Guo <shawnguo@...nel.org>
To:     Anson Huang <anson.huang@....com>
Cc:     "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        "festevam@...il.com" <festevam@...il.com>,
        "mturquette@...libre.com" <mturquette@...libre.com>,
        "sboyd@...nel.org" <sboyd@...nel.org>,
        "l.stach@...gutronix.de" <l.stach@...gutronix.de>,
        Abel Vesa <abel.vesa@....com>,
        "andrew.smirnov@...il.com" <andrew.smirnov@...il.com>,
        "ccaione@...libre.com" <ccaione@...libre.com>,
        "angus@...ea.ca" <angus@...ea.ca>,
        "agx@...xcpu.org" <agx@...xcpu.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        dl-linux-imx <linux-imx@....com>
Subject: Re: [PATCH 3/3] arm64: dts: imx8mq: add clock for SNVS RTC node

On Wed, May 15, 2019 at 01:09:36AM +0000, Anson Huang wrote:
> i.MX8MQ has clock gate for SNVS module, add clock info to SNVS
> RTC node for clock management.
> 
> Signed-off-by: Anson Huang <Anson.Huang@....com>

This one still has problem with encoding and thus cannot be applied.
Here is what I get, and there is '=20' in the patch content.

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dt=
s/freescale/imx8mq.dtsi
index e5f3133..b706de8 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -438,6 +438,8 @@
                                        offset =3D <0x34>;
                                        interrupts =3D <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
                                                <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+                                       clocks =3D <&clk IMX8MQ_CLK_SNVS_ROOT>;
+                                       clock-names =3D "snvs-rtc";
                                };
                        };
=20
--=20
2.7.4