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Message-ID: <CACRpkdZTE-FZAht+txxVXYwe42uN_f1uPthLiKG54-=_YueUnw@mail.gmail.com>
Date: Fri, 24 May 2019 13:51:10 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: Rob Herring <robh+dt@...nel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
haitao.suo@...main.com, darren.tsao@...main.com,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
alec.lin@...main.com
Subject: Re: [PATCH 1/5] dt-bindings: pinctrl: Modify pinctrl memory map
On Mon, May 20, 2019 at 10:31 AM Manivannan Sadhasivam
<manivannan.sadhasivam@...aro.org> wrote:
> Earlier, the PWM registers were included as part of the pinctrl memory
> map, but this turned to be useless as the muxing is being handled by the
> SoC pin controller itself. So, lets modify the pinctrl memory map to
> reflect the same.
>
> Fixes: 07b734fbdea2 ("dt-bindings: pinctrl: Add BM1880 pinctrl binding")
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Patch applied.
Yours,
Linus Walleij
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