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Message-ID: <4a35e070-b18a-e0f5-76b6-72054eb98b43@st.com>
Date: Fri, 24 May 2019 14:26:19 +0200
From: Alexandre Torgue <alexandre.torgue@...com>
To: Linus Walleij <linus.walleij@...aro.org>,
Benjamin Gaignard <benjamin.gaignard@...com>
CC: Maxime Coquelin <mcoquelin.stm32@...il.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
<linux-stm32@...md-mailman.stormreply.com>
Subject: Re: [PATCH 0/2] pinctrl: stm32: add suspend/resume management
On 5/24/19 1:24 PM, Linus Walleij wrote:
> On Fri, May 10, 2019 at 9:42 AM Alexandre Torgue
> <alexandre.torgue@...com> wrote:
>
>> During power sequence, GPIO hardware registers could be lost if the power
>> supply is switched off. Each device using pinctrl API is in charge of
>> managing pins during suspend/resume sequences. But for pins used as gpio or
>> irq stm32 pinctrl driver has to save the hardware configuration.
>> Each register will be saved at runtime and restored during resume sequence.
>
> Both patches applied.
>
> On the same pinctrl devel branch is also Benjamin's patches to support
> the "link_consumers" property on the pin controller descriptor to
> enable links from pin control consumers back to their pin controller
> suppliers, especially important for STMFX.
>
> Would you please check if it work fine if you turn on this feature
> for the SoC STM32 pin controller?
>
Sure. Either today or next Monday.
I let you know.
regards
Alex
> I am working a bit on refining the patches, so I want to enable testing
> with some SoC pin controllers as well and possibly make the
> behavior default.
>
> Yours,
> Linus Walleij
>
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