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Date: Fri, 24 May 2019 18:32:48 +0300 From: Dmitry Osipenko <digetx@...il.com> To: Daniel Lezcano <daniel.lezcano@...aro.org>, Thomas Gleixner <tglx@...utronix.de>, Joseph Lo <josephl@...dia.com>, Thierry Reding <thierry.reding@...il.com>, Jonathan Hunter <jonathanh@...dia.com>, Peter De Schrijver <pdeschrijver@...dia.com> Cc: linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org, Nicolas Chauvet <kwizart@...il.com> Subject: [PATCH v3 3/8] clocksource/drivers/tegra: Reset hardware state on init Reset timer's hardware state to ensure that initially it is in a predictable state. Signed-off-by: Dmitry Osipenko <digetx@...il.com> --- drivers/clocksource/timer-tegra20.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clocksource/timer-tegra20.c b/drivers/clocksource/timer-tegra20.c index 57e7aa2b80a3..739f83fdb318 100644 --- a/drivers/clocksource/timer-tegra20.c +++ b/drivers/clocksource/timer-tegra20.c @@ -132,6 +132,9 @@ static int tegra_timer_setup(unsigned int cpu) { struct timer_of *to = per_cpu_ptr(&tegra_to, cpu); + writel(0, timer_of_base(to) + TIMER_PTV); + writel(TIMER_PCR_INTR_CLR, timer_of_base(to) + TIMER_PCR); + irq_force_affinity(to->clkevt.irq, cpumask_of(cpu)); enable_irq(to->clkevt.irq); -- 2.21.0
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