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Message-ID: <20190527232849.GC8209@cz.tnic>
Date: Tue, 28 May 2019 01:28:50 +0200
From: Borislav Petkov <bp@...en8.de>
To: "Ghannam, Yazen" <Yazen.Ghannam@....com>
Cc: "Luck, Tony" <tony.luck@...el.com>,
"linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"x86@...nel.org" <x86@...nel.org>
Subject: Re: [PATCH v3 5/6] x86/MCE: Save MCA control bits that get set in
hardware
On Thu, May 23, 2019 at 08:00:33PM +0000, Ghannam, Yazen wrote:
> I did a bit more testing and I noticed that writing "0" disables a bank with no way to reenable it.
>
> For example:
> 1) Read bank10.
> a) Succeeds; returns "fffffffffffffff".
> 2) Write "0" to bank10.
> a) Succeeds; hardware register is set to "0".
> b) Hardware register is checked, and b->init=0.
> 3) Read bank10.
> a) Fails, because b->init=0.
> 4) Write non-zero value to bank10 to reenable it.
> a) Fails, because b->init=0.
> 5) Reboot needed to reset bank.
>
> Is that okay?
Nope, that doesn't sound correct to me.
I guess the cleanest way to handle his properly would be to have a
function called something like __mcheck_cpu_init_banks() which gets
called in mcheck_cpu_init() after the quirks have run and then does the
final poking of the banks and sets b->init properly.
__mcheck_cpu_init_clear_banks() should then be renamed to
__mcheck_cpu_clear_banks() to denote that it only clears the banks and
would only do:
if (!b->init)
continue;
wrmsrl(msr_ops.ctl(i), b->ctl);
wrmsrl(msr_ops.status(i), 0);
And then sprinkle some commenting to not forget the scheme again.
Yeah, this sounds clean to me but you guys might have a better idea...
Thx.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply. Srsly.
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