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Date: Tue, 28 May 2019 10:28:48 +0100 From: Billy Laws <blaws05@...il.com> To: Sowjanya Komatineni <skomatineni@...dia.com> Cc: thierry.reding@...il.com, jonathanh@...dia.com, Laxman Dewangan <ldewangan@...dia.com>, broonie@...nel.org, natechancellor@...il.com, linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org Subject: Re: [PATCH V1 00/12] LP0 entry and exit support for Tegra210 Hi, By the looks of this you configure wake events but the pmc driver still only configures lp1, which is the same as linux 4 tegra 4.4+ which also doesn't support lp0, if its selected in dts it'll just change it to LP1/SC7 (both have same code path and neither set any lp0 stuff trm says). What confuses me further is that l4t and this ptachset both configure wake events, which I think should only work in LP0 and not LP1 and yet neither have lp0 entry code for t210. I also looked at ATF, whis sets the flags to wake the cpu on interrupts, which would suggest that it only supports lp1 (in deep sleep I dont think them flags would work). Am I missing some important detail here? Two other things, will you be adding full lp0 in later patchets and will they use the bpmp or not?
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