linux-kernel - RE: [PATCH net-next v4 5/5] net: stmmac: add EHL SGMII 1Gbps PCI info and PCI ID

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Message-ID: <78EB27739596EE489E55E81C33FEC33A0B933497@DE02WEMBXB.internal.synopsys.com>
Date:   Wed, 29 May 2019 10:28:44 +0000
From:   Jose Abreu <Jose.Abreu@...opsys.com>
To:     Voon Weifeng <weifeng.voon@...el.com>,
        "David S. Miller" <davem@...emloft.net>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>
CC:     "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Giuseppe Cavallaro" <peppe.cavallaro@...com>,
        Andrew Lunn <andrew@...n.ch>,
        "Florian Fainelli" <f.fainelli@...il.com>,
        Alexandre Torgue <alexandre.torgue@...com>,
        biao huang <biao.huang@...iatek.com>,
        Ong Boon Leong <boon.leong.ong@...el.com>,
        Kweh Hock Leong <hock.leong.kweh@...el.com>
Subject: RE: [PATCH net-next v4 5/5] net: stmmac: add EHL SGMII 1Gbps PCI
 info and PCI ID

From: Voon Weifeng <weifeng.voon@...el.com>
Date: Wed, May 29, 2019 at 17:58:27

> +	plat->axi = devm_kzalloc(&pdev->dev, sizeof(*plat->axi),
> +				 GFP_KERNEL);
> +	if (!plat->axi)
> +		return -ENOMEM;

Missing line break here.

> +	plat->axi->axi_lpi_en = 0;
> +	plat->axi->axi_xit_frm = 0;
> +	plat->axi->axi_wr_osr_lmt = 0;

This is not a valid value.

> +	plat->axi->axi_rd_osr_lmt = 2;
> +	plat->axi->axi_blen[0] = 4;
> +	plat->axi->axi_blen[1] = 8;
> +	plat->axi->axi_blen[2] = 16;
> +
> +	/* Set default value for multicast hash bins */
> +	plat->multicast_filter_bins = HASH_TABLE_SIZE;
> +
> +	/* Set default value for unicast filter entries */
> +	plat->unicast_filter_entries = 1;
> +
> +	/* Set the maxmtu to a default of JUMBO_LEN */
> +	plat->maxmtu = JUMBO_LEN;
> +
> +	/* Set 32KB fifo size as the advertised fifo size in
> +	 * the HW features is not the same as the HW implementation
> +	 */

Hmm ? I'm curious, can you explain ?

> +	plat->tx_fifo_size = 32768;
> +	plat->rx_fifo_size = 32768;
> +
> +	return 0;
> +}
> +
> +static int ehl_sgmii1g_data(struct pci_dev *pdev,
> +			    struct plat_stmmacenet_data *plat)
> +{
> +	int ret;
> +
> +	/* Set common default data first */
> +	ret = ehl_common_data(pdev, plat);
> +

Remove the extra line break please.

> +	if (ret)
> +		return ret;
> +