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Date: Wed, 29 May 2019 16:26:11 +0530 From: Jagan Teki <jagan@...rulasolutions.com> To: Maxime Ripard <maxime.ripard@...tlin.com>, David Airlie <airlied@...ux.ie>, Daniel Vetter <daniel@...ll.ch>, Chen-Yu Tsai <wens@...e.org>, dri-devel@...ts.freedesktop.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org Cc: Michael Trimarchi <michael@...rulasolutions.com>, devicetree@...r.kernel.org, linux-sunxi@...glegroups.com, linux-amarula@...rulasolutions.com, Sergey Suloev <ssuloev@...altech.com>, Ryan Pannell <ryan@...kl.com>, bshah@...olab.com, Jagan Teki <jagan@...rulasolutions.com> Subject: [PATCH v9 5/9] arm64: dts: allwinner: a64: Add MIPI DSI pipeline Add MIPI DSI pipeline for Allwinner A64. - dsi node, with A64 compatible since it doesn't support DSI_SCLK gating unlike A33 - dphy node, with A64 compatible with A33 fallback since DPHY on A64 and A33 is similar - finally, attach the dsi_in to tcon0 for complete MIPI DSI Signed-off-by: Jagan Teki <jagan@...rulasolutions.com> Tested-by: Merlijn Wajer <merlijn@...zup.org> --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index b275c6d35420..44c1c11db423 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -382,6 +382,12 @@ #address-cells = <1>; #size-cells = <0>; reg = <1>; + + tcon0_out_dsi: endpoint@1 { + reg = <1>; + remote-endpoint = <&dsi_in_tcon0>; + allwinner,tcon-channel = <1>; + }; }; }; }; @@ -985,6 +991,38 @@ status = "disabled"; }; + dsi: dsi@...0000 { + compatible = "allwinner,sun50i-a64-mipi-dsi"; + reg = <0x01ca0000 0x1000>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_MIPI_DSI>; + clock-names = "bus"; + resets = <&ccu RST_BUS_MIPI_DSI>; + phys = <&dphy>; + phy-names = "dphy"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + + port { + dsi_in_tcon0: endpoint { + remote-endpoint = <&tcon0_out_dsi>; + }; + }; + }; + + dphy: d-phy@...1000 { + compatible = "allwinner,sun50i-a64-mipi-dphy", + "allwinner,sun6i-a31-mipi-dphy"; + reg = <0x01ca1000 0x1000>; + clocks = <&ccu CLK_BUS_MIPI_DSI>, + <&ccu CLK_DSI_DPHY>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_MIPI_DSI>; + status = "disabled"; + #phy-cells = <0>; + }; + hdmi: hdmi@...0000 { compatible = "allwinner,sun50i-a64-dw-hdmi", "allwinner,sun8i-a83t-dw-hdmi"; -- 2.18.0.321.gffc6fa0e3
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