linux-kernel - Re: [PATCH v3 3/5] x86/umwait: Add sysfs interface to control umwait C0.2 state

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Message-ID: <CALCETrUByHERw5ZB7q-3ka71a_4uxVi-uthTjf7JtDPEgLPjRg@mail.gmail.com>
Date:   Thu, 30 May 2019 14:10:32 -0700
From:   Andy Lutomirski <luto@...nel.org>
To:     Fenghua Yu <fenghua.yu@...el.com>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        H Peter Anvin <hpa@...or.com>,
        Andrew Cooper <andrew.cooper3@...rix.com>,
        Ashok Raj <ashok.raj@...el.com>,
        Tony Luck <tony.luck@...el.com>,
        Ravi V Shankar <ravi.v.shankar@...el.com>,
        linux-kernel <linux-kernel@...r.kernel.org>, x86 <x86@...nel.org>
Subject: Re: [PATCH v3 3/5] x86/umwait: Add sysfs interface to control umwait
 C0.2 state

On Fri, May 24, 2019 at 5:05 PM Fenghua Yu <fenghua.yu@...el.com> wrote:
>
> C0.2 state in umwait and tpause instructions can be enabled or disabled
> on a processor through IA32_UMWAIT_CONTROL MSR register.
>
> By default, C0.2 is enabled and the user wait instructions result in
> lower power consumption with slower wakeup time.
>
> But in real time systems which requrie faster wakeup time although power
> savings could be smaller, the administrator needs to disable C0.2 and all
> C0.2 requests from user applications revert to C0.1.
>
> A sysfs interface "/sys/devices/system/cpu/umwait_control/enable_c0_2" is
> created to allow the administrator to control C0.2 state during run time.
>
> Signed-off-by: Fenghua Yu <fenghua.yu@...el.com>
> Reviewed-by: Ashok Raj <ashok.raj@...el.com>
> Reviewed-by: Tony Luck <tony.luck@...el.com>
> ---
>  arch/x86/power/umwait.c | 75 ++++++++++++++++++++++++++++++++++++++---
>  1 file changed, 71 insertions(+), 4 deletions(-)
>
> diff --git a/arch/x86/power/umwait.c b/arch/x86/power/umwait.c
> index 80cc53a9c2d0..cf5de7e1cc24 100644
> --- a/arch/x86/power/umwait.c
> +++ b/arch/x86/power/umwait.c
> @@ -7,6 +7,7 @@
>  static bool umwait_c0_2_enabled = true;
>  /* Umwait max time is in TSC-quanta. Bits[1:0] are zero. */
>  static u32 umwait_max_time = 100000;
> +static DEFINE_MUTEX(umwait_lock);
>
>  /* Return value that will be used to set IA32_UMWAIT_CONTROL MSR */
>  static u32 umwait_compute_msr_value(void)
> @@ -22,7 +23,7 @@ static u32 umwait_compute_msr_value(void)
>                (umwait_max_time & MSR_IA32_UMWAIT_CONTROL_MAX_TIME);
>  }
>
> -static void umwait_control_msr_update(void)
> +static void umwait_control_msr_update(void *unused)
>  {
>         u32 msr_val;
>
> @@ -33,7 +34,9 @@ static void umwait_control_msr_update(void)
>  /* Set up IA32_UMWAIT_CONTROL MSR on CPU using the current global setting. */
>  static int umwait_cpu_online(unsigned int cpu)
>  {
> -       umwait_control_msr_update();
> +       mutex_lock(&umwait_lock);
> +       umwait_control_msr_update(NULL);
> +       mutex_unlock(&umwait_lock);

What's the mutex for?  Can't you just use READ_ONCE?

> +static void umwait_control_msr_update_all_cpus(void)
> +{
> +       u32 msr_val;
> +
> +       msr_val = umwait_compute_msr_value();
> +       /* All CPUs have same umwait control setting */
> +       on_each_cpu(umwait_control_msr_update, NULL, 1);

Why are you calling umwait_compute_msr_value()?