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Message-Id: <20190531110352.30393-2-ghung.quanta@gmail.com>
Date: Fri, 31 May 2019 19:03:52 +0800
From: George Hung <ghung.quanta@...il.com>
To: linux-edac <linux-edac@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>
Cc: benjaminfair@...gle.com, wak@...gle.com, Avi.Fishman@...oton.com,
tomer.maimon@...oton.com, Richard.Tung@...ntatw.com,
Buddy.Huang@...ntatw.com, Fran.Hsu@...ntatw.com
Subject: [PATCH v1 2/2] dt-binding: edac: add NPCM ECC documentation
Add device tree documentation for Nuvoton BMC ECC
Signed-off-by: George Hung <ghung.quanta@...il.com>
---
.../bindings/edac/npcm7xx-sdram-edac.txt | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
create mode 100644 Documentation/devicetree/bindings/edac/npcm7xx-sdram-edac.txt
diff --git a/Documentation/devicetree/bindings/edac/npcm7xx-sdram-edac.txt b/Documentation/devicetree/bindings/edac/npcm7xx-sdram-edac.txt
new file mode 100644
index 000000000000..dd4dac59a5bd
--- /dev/null
+++ b/Documentation/devicetree/bindings/edac/npcm7xx-sdram-edac.txt
@@ -0,0 +1,17 @@
+Nuvoton NPCM7xx SoC EDAC device driver
+
+The Nuvoton NPCM7xx SoC supports DDR4 memory with/without ECC and the driver
+uses the EDAC framework to implement the ECC detection and corrtection.
+
+Required properties:
+- compatible: should be "nuvoton,npcm7xx-sdram-edac"
+- reg: Memory controller register set should be <0xf0824000 0x1000>
+- interrupts: should be MC interrupt #25
+
+Example:
+
+ mc: memory-controller@...24000 {
+ compatible = "nuvoton,npcm7xx-sdram-edac";
+ reg = <0xf0824000 0x1000>;
+ interrupts = <0 25 4>;
+ };
--
2.21.0
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