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Message-ID: <CACRpkdb9swUxO9GBvZQMVu0t0-77Pr9W5RivuiVhgrM1eBGtdA@mail.gmail.com>
Date: Sat, 1 Jun 2019 19:22:32 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Krishna Yarlagadda <kyarlagadda@...dia.com>
Cc: "thierry.reding@...il.com" <thierry.reding@...il.com>,
Jon Hunter <jonathanh@...dia.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
linux-tegra@...r.kernel.org,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Peter De Schrijver <pdeschrijver@...dia.com>,
Joseph Lo <josephl@...dia.com>,
Suresh Mangipudi <smangipudi@...dia.com>,
Laxman Dewangan <ldewangan@...dia.com>, vidyas@...dia.com
Subject: Re: [PATCH V3 2/4] pinctrl: tegra: Support 32 bit register access
On Thu, May 16, 2019 at 1:53 PM Krishna Yarlagadda
<kyarlagadda@...dia.com> wrote:
> Tegra194 chip has 32 bit pinctrl registers. Existing register defines in
> header are only 16 bit.
> Modified common pinctrl-tegra driver to support 32 bit registers of
> Tegra 194 and later chips.
>
> Signed-off-by: Krishna Yarlagadda <kyarlagadda@...dia.com>
Patch applied.
Yours,
Linus Walleij
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