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Message-ID: <20190603130428.GX4797@dell>
Date: Mon, 3 Jun 2019 14:04:28 +0100
From: Lee Jones <lee.jones@...aro.org>
To: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
Cc: Mason Yang <masonccyang@...c.com.tw>, broonie@...nel.org,
marek.vasut@...il.com, linux-kernel@...r.kernel.org,
linux-spi@...r.kernel.org, bbrezillon@...nel.org,
linux-renesas-soc@...r.kernel.org,
Geert Uytterhoeven <geert+renesas@...der.be>,
robh+dt@...nel.org, mark.rutland@....com,
devicetree@...r.kernel.org, juliensu@...c.com.tw,
Simon Horman <horms@...ge.net.au>, miquel.raynal@...tlin.com
Subject: Re: [PATCH v13 3/3] dt-bindings: mfd: Document Renesas R-Car Gen3
RPC-IF controller bindings
On Wed, 22 May 2019, Sergei Shtylyov wrote:
> On 05/21/2019 10:19 AM, Mason Yang wrote:
>
> > Document the bindings used by the Renesas R-Car Gen3 RPC-IF controller.
> >
> > Signed-off-by: Mason Yang <masonccyang@...c.com.tw>
> > ---
> > .../devicetree/bindings/mfd/renesas-rpc-if.txt | 65 ++++++++++++++++++++++
> > 1 file changed, 65 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/mfd/renesas-rpc-if.txt
> >
> > diff --git a/Documentation/devicetree/bindings/mfd/renesas-rpc-if.txt b/Documentation/devicetree/bindings/mfd/renesas-rpc-if.txt
> > new file mode 100644
> > index 0000000..20ec85b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mfd/renesas-rpc-if.txt
> > @@ -0,0 +1,65 @@
> > +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings
> > +---------------------------------------------------------
> > +
> > +RPC-IF supports both SPI NOR and HyperFlash (CFI-compliant flash)
> > +
> > +Required properties:
> > +- compatible: should be an SoC-specific compatible value, followed by
> > + "renesas,rcar-gen3-rpc" as a fallback.
> > + supported SoC-specific values are:
> > + "renesas,r8a77995-rpc" (R-Car D3)
> > +- reg: should contain three register areas:
> > + first for RPC-IF registers,
> > + second for the direct mapping read mode and
> > + third for the write buffer area.
> > +- reg-names: should contain "regs", "dirmap" and "wbuf"
> > +- clocks: should contain 1 entries for the module's clock
> > +- clock-names: should contain "rpc"
> > +- power-domains: should contain system-controller(sysc) for power-domain-cell
> > +- resets: should contain clock pulse generator(cpg) for reset-cell,
> > + power-domain-cell and clock-cell
>
> That's just some nonsense, sorry...
> I suggest that you stop reposting your patches as I'm going to post
> my version of this patchset RSN (based on your patches, of course) and I'm
> going to take care of fixing this file as well.
Why is this necessary?
Why not just provide some constructive feedback instead?
> > +- #address-cells: should be 1
> > +- #size-cells: should be 0
> [...]
>
> MBR, Sergei
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
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