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Message-ID: <nycvar.YFH.7.76.1906031722380.1962@cbobk.fhfr.pm>
Date:   Mon, 3 Jun 2019 17:24:26 +0200 (CEST)
From:   Jiri Kosina <jikos@...nel.org>
To:     Sean Christopherson <sean.j.christopherson@...el.com>
cc:     Andy Lutomirski <luto@...capital.net>,
        Andy Lutomirski <luto@...nel.org>,
        "Rafael J. Wysocki" <rjw@...ysocki.net>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        "Rafael J. Wysocki" <rafael@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        the arch/x86 maintainers <x86@...nel.org>,
        Pavel Machek <pavel@....cz>, Ingo Molnar <mingo@...hat.com>,
        Borislav Petkov <bp@...en8.de>,
        "H. Peter Anvin" <hpa@...or.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Linux PM <linux-pm@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4] x86/power: Fix 'nosmt' vs. hibernation triple fault
 during resume

On Mon, 3 Jun 2019, Sean Christopherson wrote:

> For P6 and later, i.e. all modern CPUs, Intel processors go straight to
> halted state and don't fetch/decode the HLT instruction.

That'd be a rather relieving fact actually. Do you happen to know if this 
is stated in some Intel documentation and we've just overlooked it, or 
whether it's rather an information that's being carried over from 
generation to generation by whispering through grapevine?

Thanks,

-- 
Jiri Kosina
SUSE Labs

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