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Message-ID: <20190604220910.GA4814@minitux>
Date: Tue, 4 Jun 2019 15:09:10 -0700
From: Bjorn Andersson <bjorn.andersson@...aro.org>
To: Stephen Boyd <swboyd@...omium.org>
Cc: Andy Gross <agross@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Pedro Sousa <pedrom.sousa@...opsys.com>,
"James E.J. Bottomley" <jejb@...ux.ibm.com>,
"Martin K. Petersen" <martin.petersen@...cle.com>,
linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-scsi@...r.kernel.org, Evan Green <evgreen@...omium.org>
Subject: Re: [PATCH 3/3] arm64: dts: qcom: sdm845-mtp: Specify UFS
device-reset GPIO
On Tue 04 Jun 09:22 PDT 2019, Stephen Boyd wrote:
> Quoting Bjorn Andersson (2019-06-04 00:20:01)
> > Specify the UFS device-reset gpio, so that the controller will issue a
> > reset of the UFS device.
> >
> > Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>
> > ---
> > arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
> > index 2e78638eb73b..d116a0956a9c 100644
> > --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
> > +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
> > @@ -388,6 +388,8 @@
> > &ufs_mem_hc {
> > status = "okay";
> >
> > + device-reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
> > +
>
> We had to do something similar on one particular brand of UFS that we had. I
> think it was an SK Hynix part that had trouble and wouldn't provision properly.
> Either way, we did this with a pinctrl toggle in the DTS where the "init" state
> has the UFS_RESET pin asserted and then "default" state has the pin deasserted.
> That was good enough to make this work.
>
Thanks for pointing this out, I forgot to attribute these downstream
changes. I can see how this works, but I must say I find it quite
hackish.
The downstream solution seems to have evolved this into naming these
states and jumping between them (with the appropriate sleeps) during a
host reset as well.
But thanks for the confirmation that there's more than John's memory
that needs this.
Regards,
Bjorn
> &ufs_mem_hc {
> pinctrl-names = "init", "default";
> pinctrl-0 = <&ufs_dev_reset_assert>;
> pinctrl-1 = <&ufs_dev_reset_deassert>;
> };
>
> ufs_dev_reset_assert: ufs_dev_reset_assert {
> config {
> pins = "ufs_reset";
> bias-pull-down; /* default: pull down */
> drive-strength = <8>; /* default: 3.1 mA */
> output-low; /* active low reset */
> };
> };
>
> ufs_dev_reset_deassert: ufs_dev_reset_deassert {
> config {
> pins = "ufs_reset";
> bias-pull-down; /* default: pull down */
> drive-strength = <8>;
> output-high; /* active low reset */
> };
> };
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