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Date: Tue, 4 Jun 2019 15:29:39 -0700 From: Stephen Boyd <swboyd@...omium.org> To: Andy Gross <agross@...nel.org> Cc: linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org, Sibi Sankar <sibis@...eaurora.org> Subject: [PATCH] arm64: dts: sdm845: Add iommus property to qup1 The SMMU that sits in front of the QUP needs to be programmed properly so that the i2c geni driver can allocate DMA descriptors. Failure to do this leads to faults when using devices such as an i2c touchscreen where the transaction is larger than 32 bytes and we use a DMA buffer. arm-smmu 15000000.iommu: Unexpected global fault, this could be serious arm-smmu 15000000.iommu: GFSR 0x00000002, GFSYNR0 0x00000002, GFSYNR1 0x000006c0, GFSYNR2 0x00000000 Add the right SID and mask so this works. Cc: Sibi Sankar <sibis@...eaurora.org> Signed-off-by: Stephen Boyd <swboyd@...omium.org> --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index fcb93300ca62..2e57e861e17c 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -900,6 +900,7 @@ #address-cells = <2>; #size-cells = <2>; ranges; + iommus = <&apps_smmu 0x6c0 0x3>; status = "disabled"; i2c8: i2c@...000 { -- Sent by a computer through tubes
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