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Date: Tue, 4 Jun 2019 15:53:46 +0800
From: Chen-Yu Tsai <wens@...e.org>
To: Code Kipper <codekipper@...il.com>
Cc: Maxime Ripard <maxime.ripard@...e-electrons.com>,
linux-sunxi <linux-sunxi@...glegroups.com>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
Linux-ALSA <alsa-devel@...a-project.org>,
"Andrea Venturi (pers)" <be17068@...rbole.bo.it>
Subject: Re: [linux-sunxi] [PATCH v4 3/9] ASoC: sun4i-i2s: Add regmap field to
sign extend sample
On Tue, Jun 4, 2019 at 1:47 AM <codekipper@...il.com> wrote:
>
> From: Marcus Cooper <codekipper@...il.com>
>
> On the newer SoCs this is set by default to transfer a 0 after
> each sample in each slot. However the platform that this driver
> was developed on had the default setting where it padded the
> audio gain with zeros. This isn't a problem whilst we have only
> support for 16bit audio but with larger sample resolution rates
> in the pipeline then it should be fixed to also pad. Without this
> the audio gets distorted.
Curious, both the A10 and A20 manuals say the default value for this
field is 0, which means 0 padding.
sun4i_i2s_reg_defaults[] also has that field set to 0.
You're saying you are seeing the field set to 1?
ChenYu
> Signed-off-by: Marcus Cooper <codekipper@...il.com>
> ---
> sound/soc/sunxi/sun4i-i2s.c | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> index fd7c37596f21..e2961d8f6e8c 100644
> --- a/sound/soc/sunxi/sun4i-i2s.c
> +++ b/sound/soc/sunxi/sun4i-i2s.c
> @@ -134,6 +134,7 @@
> * @field_fmt_bclk: regmap field to set clk polarity.
> * @field_fmt_lrclk: regmap field to set frame polarity.
> * @field_fmt_mode: regmap field to set the operational mode.
> + * @field_fmt_sext: regmap field to set the sign extension.
> * @field_txchanmap: location of the tx channel mapping register.
> * @field_rxchanmap: location of the rx channel mapping register.
> * @field_txchansel: location of the tx channel select bit fields.
> @@ -159,6 +160,7 @@ struct sun4i_i2s_quirks {
> struct reg_field field_fmt_bclk;
> struct reg_field field_fmt_lrclk;
> struct reg_field field_fmt_mode;
> + struct reg_field field_fmt_sext;
> struct reg_field field_txchanmap;
> struct reg_field field_rxchanmap;
> struct reg_field field_txchansel;
> @@ -183,6 +185,7 @@ struct sun4i_i2s {
> struct regmap_field *field_fmt_bclk;
> struct regmap_field *field_fmt_lrclk;
> struct regmap_field *field_fmt_mode;
> + struct regmap_field *field_fmt_sext;
> struct regmap_field *field_txchanmap;
> struct regmap_field *field_rxchanmap;
> struct regmap_field *field_txchansel;
> @@ -342,6 +345,9 @@ static int sun4i_i2s_set_clk_rate(struct snd_soc_dai *dai,
> SUN8I_I2S_FMT0_LRCK_PERIOD_MASK,
> SUN8I_I2S_FMT0_LRCK_PERIOD(32));
>
> + /* Set sign extension to pad out LSB with 0 */
> + regmap_field_write(i2s->field_fmt_sext, 0);
> +
> return 0;
> }
>
> @@ -887,6 +893,7 @@ static const struct sun4i_i2s_quirks sun4i_a10_i2s_quirks = {
> .field_fmt_lrclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
> .has_slave_select_bit = true,
> .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1),
> + .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 8, 8),
> .field_txchanmap = REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
> .field_rxchanmap = REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
> .field_txchansel = REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
> @@ -904,6 +911,7 @@ static const struct sun4i_i2s_quirks sun6i_a31_i2s_quirks = {
> .field_fmt_lrclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
> .has_slave_select_bit = true,
> .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1),
> + .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 8, 8),
> .field_txchanmap = REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
> .field_rxchanmap = REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
> .field_txchansel = REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
> @@ -944,6 +952,7 @@ static const struct sun4i_i2s_quirks sun8i_h3_i2s_quirks = {
> .field_fmt_bclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
> .field_fmt_lrclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 19, 19),
> .field_fmt_mode = REG_FIELD(SUN4I_I2S_CTRL_REG, 4, 5),
> + .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 4, 5),
> .field_txchanmap = REG_FIELD(SUN8I_I2S_TX_CHAN_MAP_REG, 0, 31),
> .field_rxchanmap = REG_FIELD(SUN8I_I2S_RX_CHAN_MAP_REG, 0, 31),
> .field_txchansel = REG_FIELD(SUN8I_I2S_TX_CHAN_SEL_REG, 0, 2),
> @@ -1006,6 +1015,12 @@ static int sun4i_i2s_init_regmap_fields(struct device *dev,
> if (IS_ERR(i2s->field_fmt_mode))
> return PTR_ERR(i2s->field_fmt_mode);
>
> + i2s->field_fmt_sext =
> + devm_regmap_field_alloc(dev, i2s->regmap,
> + i2s->variant->field_fmt_sext);
> + if (IS_ERR(i2s->field_fmt_sext))
> + return PTR_ERR(i2s->field_fmt_sext);
> +
> i2s->field_txchanmap =
> devm_regmap_field_alloc(dev, i2s->regmap,
> i2s->variant->field_txchanmap);
> --
> 2.21.0
>
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