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Message-ID: <CAFCwf13gd-tNn_YAiNzDCNdi-now-N4YPzd9+tqfZypyBrML1Q@mail.gmail.com>
Date: Tue, 4 Jun 2019 15:14:15 +0300
From: Oded Gabbay <oded.gabbay@...il.com>
To: Tomer Tayar <ttayar@...ana.ai>
Cc: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] habanalabs: Read upper bits of trace buffer from RWPHI
On Tue, Jun 4, 2019 at 2:35 PM Tomer Tayar <ttayar@...ana.ai> wrote:
>
> The trace buffer address is 40 bits wide.
> The end of the buffer is set in the RWP register (lower 32 bits), and in
> the RWPHI register (upper 8 bits).
> Currently only the lower 32 bits are read, and this patch fixes it and
> concatenates the upper 8 bits to the output address.
>
> Signed-off-by: Tomer Tayar <ttayar@...ana.ai>
> ---
> drivers/misc/habanalabs/goya/goya_coresight.c | 14 ++++++++++++--
> 1 file changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/misc/habanalabs/goya/goya_coresight.c b/drivers/misc/habanalabs/goya/goya_coresight.c
> index 39f62ce72660..d7ec7ad84cc6 100644
> --- a/drivers/misc/habanalabs/goya/goya_coresight.c
> +++ b/drivers/misc/habanalabs/goya/goya_coresight.c
> @@ -425,8 +425,18 @@ static int goya_config_etr(struct hl_device *hdev,
> WREG32(base_reg + 0x28, 0);
> WREG32(base_reg + 0x304, 0);
>
> - if (params->output_size >= sizeof(u32))
> - *(u32 *) params->output = RREG32(base_reg + 0x18);
> + if (params->output_size >= sizeof(u64)) {
> + u32 rwp, rwphi;
> +
> + /*
> + * The trace buffer address is 40 bits wide. The end of
> + * the buffer is set in the RWP register (lower 32
> + * bits), and in the RWPHI register (upper 8 bits).
> + */
> + rwp = RREG32(base_reg + 0x18);
> + rwphi = RREG32(base_reg + 0x3c) & 0xff;
> + *(u64 *) params->output = ((u64) rwphi << 32) | rwp;
> + }
> }
>
> return 0;
> --
> 2.17.1
>
This patch is:
Reviewed-by: Oded Gabbay <oded.gabbay@...il.com>
applied to -fixes
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