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Message-ID: <86sgsph0uc.fsf@baylibre.com>
Date: Tue, 04 Jun 2019 16:38:51 +0200
From: Loys Ollivier <lollivier@...libre.com>
To: Paul Walmsley <paul.walmsley@...ive.com>,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Cc: Mark Rutland <mark.rutland@....com>, devicetree@...r.kernel.org,
Paul Walmsley <paul@...an.com>,
Albert Ou <aou@...s.berkeley.edu>,
Palmer Dabbelt <palmer@...ive.com>,
Rob Herring <robh+dt@...nel.org>,
ShihPo Hung <shihpo.hung@...ive.com>
Subject: Re: [PATCH v3 4/5] riscv: dts: add initial support for the SiFive FU540-C000 SoC
On Sun 02 Jun 2019 at 01:04, Paul Walmsley <paul.walmsley@...ive.com> wrote:
> Add initial support for the SiFive FU540-C000 SoC. This is a 28nm SoC
> based around the SiFive U54-MC core complex and a TileLink
> interconnect.
>
> This file is expected to grow as more device drivers are added to the
> kernel.
>
> This patch includes a fix to the QSPI memory map due to a
> documentation bug, found by ShihPo Hung <shihpo.hung@...ive.com>, adds
> entries for the I2C controller, and merges all DT changes that
> formerly were made dynamically by the riscv-pk BBL proxy kernel.
>
> Signed-off-by: Paul Walmsley <paul.walmsley@...ive.com>
> Signed-off-by: Paul Walmsley <paul@...an.com>
Tested-by: Loys Ollivier <lollivier@...libre.com>
> Cc: Rob Herring <robh+dt@...nel.org>
> Cc: Mark Rutland <mark.rutland@....com>
> Cc: Palmer Dabbelt <palmer@...ive.com>
> Cc: Albert Ou <aou@...s.berkeley.edu>
> Cc: ShihPo Hung <shihpo.hung@...ive.com>
> Cc: devicetree@...r.kernel.org
> Cc: linux-riscv@...ts.infradead.org
> Cc: linux-kernel@...r.kernel.org
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