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Date: Thu, 6 Jun 2019 10:41:46 +0300
From: Avi Fishman <avifishman70@...il.com>
To: George Hung <ghung.quanta@...il.com>
Cc: linux-edac <linux-edac@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
Mark Rutland <mark.rutland@....com>,
devicetree <devicetree@...r.kernel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Benjamin Fair <benjaminfair@...gle.com>, paulmck@...ux.ibm.com,
Patrick Venture <venture@...gle.com>,
OpenBMC Maillist <openbmc@...ts.ozlabs.org>,
Jonathan Cameron <Jonathan.Cameron@...wei.com>,
Nicolas Ferre <nicolas.ferre@...rochip.com>,
Tali Perry <tali.perry1@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Borislav Petkov <bp@...en8.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
James Morse <james.morse@....com>,
"William A. Kennington III" <wak@...gle.com>, davem@...emloft.net,
Tomer Maimon <tomer.maimon@...oton.com>,
Avi Fishman <Avi.Fishman@...oton.com>
Subject: Re: [PATCH 5.2 v2 2/2] dt-binding: edac: add NPCM ECC documentation
On Wed, Jun 5, 2019 at 5:19 PM George Hung <ghung.quanta@...il.com> wrote:
>
> Add device tree documentation for Nuvoton BMC ECC
>
> Signed-off-by: George Hung <ghung.quanta@...il.com>
Reviewed-by: Avi Fishman <avifishman70@...il.com>
> ---
> .../bindings/edac/npcm7xx-sdram-edac.txt | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/edac/npcm7xx-sdram-edac.txt
>
> diff --git a/Documentation/devicetree/bindings/edac/npcm7xx-sdram-edac.txt b/Documentation/devicetree/bindings/edac/npcm7xx-sdram-edac.txt
> new file mode 100644
> index 000000000000..dd4dac59a5bd
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/edac/npcm7xx-sdram-edac.txt
> @@ -0,0 +1,17 @@
> +Nuvoton NPCM7xx SoC EDAC device driver
> +
> +The Nuvoton NPCM7xx SoC supports DDR4 memory with/without ECC and the driver
> +uses the EDAC framework to implement the ECC detection and corrtection.
> +
> +Required properties:
> +- compatible: should be "nuvoton,npcm7xx-sdram-edac"
> +- reg: Memory controller register set should be <0xf0824000 0x1000>
> +- interrupts: should be MC interrupt #25
> +
> +Example:
> +
> + mc: memory-controller@...24000 {
> + compatible = "nuvoton,npcm7xx-sdram-edac";
> + reg = <0xf0824000 0x1000>;
> + interrupts = <0 25 4>;
> + };
> --
> 2.21.0
>
--
Regards,
Avi
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