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Message-Id: <20190607210346.5EEF8208E3@mail.kernel.org>
Date:   Fri, 07 Jun 2019 14:03:45 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Michael Turquette <mturquette@...libre.com>,
        Paul Cercueil <paul@...pouillou.net>
Cc:     linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        od@...c.me, Paul Cercueil <paul@...pouillou.net>
Subject: Re: [PATCH 1/5] clk: ingenic: Add support for divider tables

Quoting Paul Cercueil (2019-05-02 14:24:58)
> Some clocks provided on Ingenic SoCs have dividers, whose hardware value
> as written in the register cannot be expressed as an affine function
> to the actual divider value.
> 
> For instance, for the CPU clock on the JZ4770, the dividers are coded as
> follows:
> 
>     ------------------

Applied to clk-next

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