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Date: Thu, 6 Jun 2019 22:14:36 -0700 (PDT) From: Paul Walmsley <paul.walmsley@...ive.com> To: Loys Ollivier <lollivier@...libre.com> cc: linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org Subject: Re: [PATCH v3 0/5] arch: riscv: add board and SoC DT file support On Tue, 4 Jun 2019, Loys Ollivier wrote: > On Sun 02 Jun 2019 at 01:04, Paul Walmsley <paul.walmsley@...ive.com> wrote: > > > Add support for building flattened DT files from DT source files under > > arch/riscv/boot/dts. Follow existing kernel precedent from other SoC > > architectures. Start our board support by adding initial support for > > the SiFive FU540 SoC and the first development board that uses it, the > > SiFive HiFive Unleashed A00. > > > > This third version of the patch set adds I2C data for the chip, > > incorporates all remaining changes that riscv-pk was making > > automatically, and addresses a comment from Rob Herring > > <robh@...nel.org>. > > > > Boot-tested on v5.2-rc1 on a HiFive Unleashed A00 board, using the > > BBL and open-source FSBL, with modifications to pass in the DTB > > file generated by these patches. > > > > This patch series can be found, along with the PRCI patch set > > and the DT macro prerequisite patch, at: > > > > https://github.com/sifive/riscv-linux/tree/dev/paulw/dts-v5.2-rc1 > > Tested patch 1, 4 and 5 using FSBL + OpenSBI + U-Boot on HiFive Unleashed. > Tested-by: Loys Ollivier <lollivier@...libre.com> Thanks very much for your testing! - Paul
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