linux-kernel - Re: [PATCH 00/25] clk: sunxi-ng: clk parent rewrite part 1

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Tue, 11 Jun 2019 13:34:27 +0800
From:   Chen-Yu Tsai <wens@...nel.org>
To:     Stephen Boyd <sboyd@...nel.org>
Cc:     Chen-Yu Tsai <wens@...nel.org>,
        Maxime Ripard <maxime.ripard@...tlin.com>,
        Michael Turquette <mturquette@...libre.com>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        linux-clk <linux-clk@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 00/25] clk: sunxi-ng: clk parent rewrite part 1

On Sat, Jun 8, 2019 at 2:46 AM Stephen Boyd <sboyd@...nel.org> wrote:
>
> Quoting Chen-Yu Tsai (2019-06-03 09:38:22)
> > Hi Stephen,
> >
> > On Mon, May 20, 2019 at 5:03 PM Maxime Ripard <maxime.ripard@...tlin.com> wrote:
> > >
> > > On Mon, May 20, 2019 at 04:03:56PM +0800, Chen-Yu Tsai wrote:
> > > > From: Chen-Yu Tsai <wens@...e.org>
> > > >
> > > > Hi everyone,
> > > >
> > > > This is series is the first part of a large series (I haven't done the
> > > > rest) of patches to rewrite the clk parent relationship handling within
> > > > the sunxi-ng clk driver. This is based on Stephen's recent work allowing
> > > > clk drivers to specify clk parents using struct clk_hw * or parsing DT
> > > > phandles in the clk node.
> > > >
> > > > This series can be split into a few major parts:
> > > >
> > > > 1) The first patch is a small fix for clk debugfs representation. This
> > > >    was done before commit 1a079560b145 ("clk: Cache core in
> > > >    clk_fetch_parent_index() without names") was posted, so it might or
> > > >    might not be needed. Found this when checking my work using
> > > >    clk_possible_parents.
> > > >
> > > > 2) A bunch of CLK_HW_INIT_* helper macros are added. These cover the
> > > >    situations I encountered, or assume I will encounter, such as single
> > > >    internal (struct clk_hw *) parent, single DT (struct clk_parent_data
> > > >    .fw_name), multiple internal parents, and multiple mixed (internal +
> > > >    DT) parents. A special variant for just an internal single parent is
> > > >    added, CLK_HW_INIT_HWS, which lets the driver share the singular
> > > >    list, instead of having the compiler create a compound literal every
> > > >    time. It might even make sense to only keep this variant.
> > > >
> > > > 3) A bunch of CLK_FIXED_FACTOR_* helper macros are added. The rationale
> > > >    is the same as the single parent CLK_HW_INIT_* helpers.
> > > >
> > > > 4) Bulk conversion of CLK_FIXED_FACTOR to use local parent references,
> > > >    either struct clk_hw * or DT .fw_name types, whichever the hardware
> > > >    requires.
> > > >
> > > > 5) The beginning of SUNXI_CCU_GATE conversion to local parent
> > > >    references. This part is not done. They are included as justification
> > > >    and examples for the shared list of clk parents case.
> > >
> > > That series is pretty neat. As far as sunxi is concerned, you can add my
> > > Acked-by: Maxime Ripard <maxime.ripard@...tlin.com>
> > >
> > > > I realize this is going to be many patches every time I convert a clock
> > > > type. Going forward would the people involved prefer I send out
> > > > individual patches like this series, or squash them all together?
> > >
> > > For bisection, I guess it would be good to keep the approach you've
> > > had in this series. If this is really too much, I guess we can always
> > > change oru mind later on.
> >
> > Any thoughts on this series and how to proceed?
> >
>
> I have a few minor nitpicks but otherwise the series looks good to me.
> I'm perfectly happy to see the individual patches unless you want to
> squash them into one big patch. I can review the conversions either way.

OK. Based on your and Maxime's response, I'll send them individually.

> Did you need me to apply any patches here? Or can I assume you'll resend
> with a pull request so it can be merged into clk-next?

I can send them as part of our normal pull request. Or did you want this
as a separate topic?

I'll still send out a v2 to cover your review comments.

> BTW, did you have to update any DT bindings or documentation? I didn't
> see anything, so I'm a little surprised that all that stuff was already
> in place.

The bindings had the clocks / clock-names all defined, and the DT all had
the properties, because we had already gone through one rewrite. It's just
the driver didn't follow them properly, because the parents were cross
node / driver, and we had these statically initialized parent name arrays.

I had started work on having the driver rewrite the parents lists based on
fetching clock names via DT, but it was far from elegant. Then this came
up. :)


Regards
ChenYu