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Message-Id: <20190611151731.6135-3-msys.mizuma@gmail.com>
Date:   Tue, 11 Jun 2019 11:17:31 -0400
From:   Masayoshi Mizuma <msys.mizuma@...il.com>
To:     Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        linux-arm-kernel@...ts.infradead.org
Cc:     Masayoshi Mizuma <msys.mizuma@...il.com>,
        Masayoshi Mizuma <m.mizuma@...fujitsu.com>,
        linux-kernel@...r.kernel.org,
        Hidetoshi Seto <seto.hidetoshi@...fujitsu.com>,
        Zhang Lei <zhang.lei@...fujitsu.com>
Subject: [PATCH 2/2] arm64/mm: show TAINT_CPU_OUT_OF_SPEC warning if the cache size is over the spec.

From: Masayoshi Mizuma <m.mizuma@...fujitsu.com>

Show the warning and taints as TAINT_CPU_OUT_OF_SPEC if the cache line
size is greater than the maximum.

Signed-off-by: Masayoshi Mizuma <m.mizuma@...fujitsu.com>
Reviewed-by: Hidetoshi Seto <seto.hidetoshi@...fujitsu.com>
Tested-by: Zhang Lei <zhang.lei@...fujitsu.com>
---
 arch/arm64/include/asm/cache.h | 2 ++
 arch/arm64/mm/init.c           | 5 +++++
 2 files changed, 7 insertions(+)

diff --git a/arch/arm64/include/asm/cache.h b/arch/arm64/include/asm/cache.h
index 926434f413fa..636e277fefc9 100644
--- a/arch/arm64/include/asm/cache.h
+++ b/arch/arm64/include/asm/cache.h
@@ -91,6 +91,8 @@ static inline u32 cache_type_cwg(void)
 
 #define __read_mostly __attribute__((__section__(".data..read_mostly")))
 
+#define ARM64_MAX_CACHE_LINE_SIZE	2048
+
 static inline int cache_line_size(void)
 {
 	u32 cwg = cache_type_cwg();
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index d2adffb81b5d..df621d90b19c 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -562,6 +562,11 @@ void __init mem_init(void)
 		 */
 		sysctl_overcommit_memory = OVERCOMMIT_ALWAYS;
 	}
+
+	WARN_TAINT(cache_line_size() > ARM64_MAX_CACHE_LINE_SIZE,
+		   TAINT_CPU_OUT_OF_SPEC,
+		   "CTR_EL0.CWG is greater than the spec (%d > %d)",
+		   cache_line_size(), ARM64_MAX_CACHE_LINE_SIZE);
 }
 
 void free_initmem(void)
-- 
2.20.1

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