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Message-ID: <AM0PR04MB673830A6DF6FEDFC9155037184EC0@AM0PR04MB6738.eurprd04.prod.outlook.com>
Date:   Wed, 12 Jun 2019 11:36:45 +0000
From:   "Z.q. Hou" <zhiqiang.hou@....com>
To:     Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>
CC:     "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "l.subrahmanya@...iveil.co.in" <l.subrahmanya@...iveil.co.in>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        Leo Li <leoyang.li@....com>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
        "will.deacon@....com" <will.deacon@....com>,
        Mingkai Hu <mingkai.hu@....com>,
        "M.h. Lian" <minghuan.lian@....com>,
        Xiaowei Bao <xiaowei.bao@....com>
Subject: RE: [PATCHv5 16/20] PCI: mobiveil: Add link up condition check

Hi Lorenzo,

Thanks a lot for your comments!

> -----Original Message-----
> From: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
> Sent: 2019年6月12日 1:18
> To: Z.q. Hou <zhiqiang.hou@....com>; bhelgaas@...gle.com
> Cc: linux-pci@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> devicetree@...r.kernel.org; linux-kernel@...r.kernel.org;
> robh+dt@...nel.org; mark.rutland@....com; l.subrahmanya@...iveil.co.in;
> shawnguo@...nel.org; Leo Li <leoyang.li@....com>;
> catalin.marinas@....com; will.deacon@....com; Mingkai Hu
> <mingkai.hu@....com>; M.h. Lian <minghuan.lian@....com>; Xiaowei Bao
> <xiaowei.bao@....com>
> Subject: Re: [PATCHv5 16/20] PCI: mobiveil: Add link up condition check
> 
> NB: Please trim the CC list and keep it to concerned maintainers.
> 
> On Fri, Apr 12, 2019 at 08:36:48AM +0000, Z.q. Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@....com>
> >
> > Avoid to issue CFG transactions to link partner when the PCIe link is
> > not up.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@....com>
> > ---
> > V5:
> >  - Corrected the subject.
> >
> >  drivers/pci/controller/pcie-mobiveil.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/pci/controller/pcie-mobiveil.c
> > b/drivers/pci/controller/pcie-mobiveil.c
> > index 621852078caf..1ee3ea2570c0 100644
> > --- a/drivers/pci/controller/pcie-mobiveil.c
> > +++ b/drivers/pci/controller/pcie-mobiveil.c
> > @@ -283,6 +283,10 @@ static bool mobiveil_pcie_valid_device(struct
> > pci_bus *bus, unsigned int devfn)  {
> >  	struct mobiveil_pcie *pcie = bus->sysdata;
> >
> > +	/* If there is no link, then there is no device */
> > +	if (bus->number > pcie->root_bus_nr && !mobiveil_pcie_link_up(pcie))
> 
> I think Bjorn mentioned this a million times already, eg:
> 
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.ke
> rnel.org%2Flinux-pci%2F20190411201535.GS256045%40google.com%2F&am
> p;data=02%7C01%7Czhiqiang.hou%40nxp.com%7Cffb4c8dcebe4493a375908
> d6ee90b471%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63695
> 8702637973543&amp;sdata=m%2FqV5zohqyBMUDT7zrVjF%2FLtYeJZO36rdY
> eMTPGGbHg%3D&amp;reserved=0
> 
> this is racy and gives a false sense of robustness. We have code in the kernel
> that checks the link but adding more seems silly to me, so I am inclined to
> drop this patch.
> 

Understand, drop it.

Thanks,
Zhiqiang

> Lorenzo
> 
> > +		return false;
> > +
> >  	/* Only one device down on each root port */
> >  	if ((bus->number == pcie->root_bus_nr) && (devfn > 0))
> >  		return false;
> > --
> > 2.17.1
> >

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