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Message-ID: <CAByghJZJzFN9c9V-o=SV0z07++RPqsB0R8MTsovbtLr3vqJgyw@mail.gmail.com>
Date:   Wed, 12 Jun 2019 15:49:03 +0300
From:   Igor Opaniuk <igor.opaniuk@...il.com>
To:     Stefan Agner <stefan@...er.ch>
Cc:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        robh+dt@...nel.org, mark.rutland@....com, shawnguo@...nel.org,
        s.hauer@...gutronix.de, kernel@...gutronix.de,
        Fabio Estevam <festevam@...il.com>, linux-imx@....com,
        Marcel Ziswiler <marcel@...wiler.com>,
        Marcel Ziswiler <marcel.ziswiler@...adex.com>
Subject: Re: [PATCH 1/1] ARM: dts: imx6ull-colibri: enable UHS-I for USDHC1

Hi Stefan,

On Wed, Jun 12, 2019 at 3:17 PM Stefan Agner <stefan@...er.ch> wrote:
>
> On 06.06.2019 11:06, Igor Opaniuk wrote:
> > From: Igor Opaniuk <igor.opaniuk@...adex.com>
> >
> > Allows to use the SD interface at a higher speed mode if the card
> > supports it. For this the signaling voltage is switched from 3.3V to
> > 1.8V under the usdhc1's drivers control.
> >
> > Signed-off-by: Igor Opaniuk <igor.opaniuk@...adex.com>
> > ---
> >  arch/arm/boot/dts/imx6ul.dtsi                  |  4 ++++
> >  arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 11 +++++++++--
> >  arch/arm/boot/dts/imx6ull-colibri.dtsi         |  6 ++++++
> >  3 files changed, 19 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
> > index fc388b84bf22..91a0ced44e27 100644
> > --- a/arch/arm/boot/dts/imx6ul.dtsi
> > +++ b/arch/arm/boot/dts/imx6ul.dtsi
> > @@ -857,6 +857,8 @@
> >                                        <&clks IMX6UL_CLK_USDHC1>,
> >                                        <&clks IMX6UL_CLK_USDHC1>;
> >                               clock-names = "ipg", "ahb", "per";
> > +                             fsl,tuning-step= <2>;
> > +                             fsl,tuning-start-tap = <20>;
> >                               bus-width = <4>;
> >                               status = "disabled";
> >                       };
> > @@ -870,6 +872,8 @@
> >                                        <&clks IMX6UL_CLK_USDHC2>;
> >                               clock-names = "ipg", "ahb", "per";
> >                               bus-width = <4>;
> > +                             fsl,tuning-step= <2>;
> > +                             fsl,tuning-start-tap = <20>;
> >                               status = "disabled";
> >                       };
> >
> > diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> > b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> > index 006690ea98c0..7dc7770cf52c 100644
> > --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> > +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> > @@ -145,13 +145,20 @@
> >  };
> >
> >  &usdhc1 {
> > -     pinctrl-names = "default";
> > +     pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
> >       pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>;
> > -     no-1-8-v;
> > +     pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>;
> > +     pinctrl-2 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>;
>
> Should that not be pinctrl_usdhc1_200mhz?
>

Correct, thanks for pointing this out.
Taking into account that the patch was already accepted by Shawn, will
send another to fix this typo ASAP (added to my todo list).

Thanks

> --
> Stefan
>
> > +     pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_sleep_cd>;
> >       cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
> >       disable-wp;
> >       wakeup-source;
> >       keep-power-in-suspend;
> >       vmmc-supply = <&reg_3v3>;
> > +     vqmmc-supply = <&reg_sd1_vmmc>;
> > +     sd-uhs-sdr12;
> > +     sd-uhs-sdr25;
> > +     sd-uhs-sdr50;
> > +     sd-uhs-sdr104;
> >       status = "okay";
> >  };
> > diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> > b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> > index 9ad1da159768..d56728f03c35 100644
> > --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> > +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> > @@ -545,6 +545,12 @@
> >               >;
> >       };
> >
> > +     pinctrl_snvs_usdhc1_sleep_cd: snvs-usdhc1-cd-grp-slp {
> > +             fsl,pins = <
> > +                     MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00     0x0
> > +             >;
> > +     };
> > +
> >       pinctrl_snvs_wifi_pdn: snvs-wifi-pdn-grp {
> >               fsl,pins = <
> >                       MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11       0x14



-- 
Best regards - Freundliche GrĂ¼sse - Meilleures salutations

Igor Opaniuk

mailto: igor.opaniuk@...il.com
skype: igor.opanyuk
+380 (93) 836 40 67
http://ua.linkedin.com/in/iopaniuk

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