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Date: Thu, 13 Jun 2019 10:29:21 +0800 From: Qii Wang <qii.wang@...iatek.com> To: Boris Brezillon <boris.brezillon@...labora.com> CC: <bbrezillon@...nel.org>, <devicetree@...r.kernel.org>, <srv_heupstream@...iatek.com>, <leilk.liu@...iatek.com>, <gregkh@...uxfoundation.org>, <xinping.qian@...iatek.com>, <linux-kernel@...r.kernel.org>, <liguo.zhang@...iatek.com>, <linux-mediatek@...ts.infradead.org>, <matthias.bgg@...il.com>, <linux-i3c@...ts.infradead.org>, <linux-arm-kernel@...ts.infradead.org> Subject: Re: [PATCH 2/2] i3c: master: Add driver for MediaTek IP On Tue, 2019-06-11 at 14:28 +0200, Boris Brezillon wrote: > On Tue, 11 Jun 2019 20:25:22 +0800 > Qii Wang <qii.wang@...iatek.com> wrote: > > > On Tue, 2019-06-04 at 20:26 +0800, Qii Wang wrote: > > > On Tue, 2019-06-04 at 09:58 +0200, Boris Brezillon wrote: > > > > On Mon, 3 Jun 2019 11:51:03 +0800 > > > > Qii Wang <qii.wang@...iatek.com> wrote: > > > > > > > > > > > > > +static int mtk_i3c_master_probe(struct platform_device *pdev) > > > > > +{ > > > > > + struct device *dev = &pdev->dev; > > > > > + struct mtk_i3c_master *master; > > > > > + struct resource *res; > > > > > + int ret, irqnr; > > > > > + > > > > > + master = devm_kzalloc(dev, sizeof(*master), GFP_KERNEL); > > > > > + if (!master) > > > > > + return -ENOMEM; > > > > > + > > > > > + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "main"); > > > > > + master->regs = devm_ioremap_resource(dev, res); > > > > > + if (IS_ERR(master->regs)) > > > > > + return PTR_ERR(master->regs); > > > > > + > > > > > + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma"); > > > > > + master->dma_regs = devm_ioremap_resource(dev, res); > > > > > + if (IS_ERR(master->dma_regs)) > > > > > + return PTR_ERR(master->dma_regs); > > > > > + > > > > > + irqnr = platform_get_irq(pdev, 0); > > > > > + if (irqnr < 0) > > > > > + return irqnr; > > > > > + > > > > > + ret = devm_request_irq(dev, irqnr, mtk_i3c_master_irq, > > > > > + IRQF_TRIGGER_NONE, DRV_NAME, master); > > > > > + if (ret < 0) { > > > > > + dev_err(dev, "Request I3C IRQ %d fail\n", irqnr); > > > > > + return ret; > > > > > + } > > > > > + > > > > > + ret = of_property_read_u32(pdev->dev.of_node, "clock-div", > > > > > + &master->clk_src_div); > > > > > > > > You say in one comment that this clock divider is fixed in HW but might > > > > change on a per-SoC basis. If that's the case, you should get rid of > > > > this clock-div prop and attach the divider to the compatible (using an > > > > mtk_i3c_master_variant struct that contains a divider field). > > > > > > > > > > ok, I will attach the divider to the compatible. > > > > > I have rechecked your comment, maybe I have misunderstood what you mean. > > "clock-div" changes according to i2c source clock, different project may > > change i2c source clock, The previous dt-binding may be misleading, I > > will modify it. > > Is it fixed or configurable? Maybe it should be modeled as a clk > driver. What's for sure is that we shouldn't have this divider defined > in the DT. ok, I have let the clk driver handle it, and remove it in DT and i3c driver. Thanks!
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