[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Pine.LNX.4.44L0.1906131253230.1307-100000@iolanthe.rowland.org>
Date: Thu, 13 Jun 2019 12:58:11 -0400 (EDT)
From: Alan Stern <stern@...land.harvard.edu>
To: David Howells <dhowells@...hat.com>
cc: Peter Zijlstra <peterz@...radead.org>, <akiyks@...il.com>,
<andrea.parri@...rulasolutions.com>, <boqun.feng@...il.com>,
<dlustig@...dia.com>, <j.alglave@....ac.uk>,
<luc.maranget@...ia.fr>, <npiggin@...il.com>,
<paulmck@...ux.ibm.com>, <will.deacon@....com>,
<paul.burton@...s.com>, <linux-kernel@...r.kernel.org>,
<torvalds@...ux-foundation.org>
Subject: Re: [PATCH v2 0/4] atomic: Fixes to smp_mb__{before,after}_atomic()
and mips.
On Thu, 13 Jun 2019, David Howells wrote:
> Peter Zijlstra <peterz@...radead.org> wrote:
>
> > Basically we fail for:
> >
> > *x = 1;
> > atomic_inc(u);
> > smp_mb__after_atomic();
> > r0 = *y;
> >
> > Because, while the atomic_inc() implies memory order, it
> > (surprisingly) does not provide a compiler barrier. This then allows
> > the compiler to re-order like so:
>
> To quote memory-barriers.txt:
>
> (*) smp_mb__before_atomic();
> (*) smp_mb__after_atomic();
>
> These are for use with atomic (such as add, subtract, increment and
> decrement) functions that don't return a value, especially when used for
> reference counting. These functions do not imply memory barriers.
>
> so it's entirely to be expected?
The text is perhaps ambiguous. It means that the atomic functions
which don't return values -- like atomic_inc() -- do not imply memory
barriers. It doesn't mean that smp_mb__before_atomic() and
smp_mb__after_atomic() do not imply memory barriers.
The behavior Peter described is not to be expected. The expectation is
that the smp_mb__after_atomic() in the example should force the "*x =
1" store to execute before the "r0 = *y" load. But on current x86 it
doesn't force this, for the reason explained in the description.
Alan
Powered by blists - more mailing lists