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Message-Id: <20190613180931.65445-5-swboyd@chromium.org>
Date: Thu, 13 Jun 2019 11:09:27 -0700
From: Stephen Boyd <swboyd@...omium.org>
To: Peter Huewe <peterhuewe@....de>,
Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>
Cc: Andrey Pronin <apronin@...omium.org>, linux-kernel@...r.kernel.org,
Jason Gunthorpe <jgg@...pe.ca>, Arnd Bergmann <arnd@...db.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
linux-integrity@...r.kernel.org, devicetree@...r.kernel.org,
Duncan Laurie <dlaurie@...omium.org>,
Guenter Roeck <groeck@...omium.org>,
Rob Herring <robh+dt@...nel.org>
Subject: [PATCH 4/8] dt-bindings: tpm: document properties for cr50
From: Andrey Pronin <apronin@...omium.org>
Add TPM2.0 PTP FIFO compatible SPI interface for chips with Cr50
firmware.
Signed-off-by: Andrey Pronin <apronin@...omium.org>
Cc: Rob Herring <robh+dt@...nel.org>
Signed-off-by: Stephen Boyd <swboyd@...omium.org>
---
This is a resend of https://lkml.kernel.org/r/1469757314-116169-2-git-send-email-apronin@chromium.org
with status removed.
.../bindings/security/tpm/cr50_spi.txt | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
create mode 100644 Documentation/devicetree/bindings/security/tpm/cr50_spi.txt
diff --git a/Documentation/devicetree/bindings/security/tpm/cr50_spi.txt b/Documentation/devicetree/bindings/security/tpm/cr50_spi.txt
new file mode 100644
index 000000000000..401f4ba281b7
--- /dev/null
+++ b/Documentation/devicetree/bindings/security/tpm/cr50_spi.txt
@@ -0,0 +1,19 @@
+* H1 Secure Microcontroller with Cr50 Firmware on SPI Bus.
+
+H1 Secure Microcontroller running Cr50 firmware provides several
+functions, including TPM-like functionality. It communicates over
+SPI using the FIFO protocol described in the PTP Spec, section 6.
+
+Required properties:
+- compatible: Should be "google,cr50".
+- spi-max-frequency: Maximum SPI frequency.
+
+Example:
+
+&spi0 {
+ cr50@0 {
+ compatible = "google,cr50";
+ reg = <0>;
+ spi-max-frequency = <800000>;
+ };
+};
--
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