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Message-Id: <20190614165454.13743-3-heiko@sntech.de>
Date: Fri, 14 Jun 2019 18:54:52 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: linux-rockchip@...ts.infradead.org
Cc: linux-arm-kernel@...ts.infradead.org,
justin.swartz@...ingedge.co.za, linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org, mturquette@...libre.com,
sboyd@...nel.org, Heiko Stuebner <heiko@...ech.de>
Subject: [PATCH 2/4] clk: rockchip: export HDMIPHY clock
Export the hdmiphy clock mux via the newly added clock-id.
Signed-off-by: Heiko Stuebner <heiko@...ech.de>
---
drivers/clk/rockchip/clk-rk3228.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c
index 1c5267d134ee..d17cfb7a3ff4 100644
--- a/drivers/clk/rockchip/clk-rk3228.c
+++ b/drivers/clk/rockchip/clk-rk3228.c
@@ -247,7 +247,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
RK2928_CLKGATE_CON(4), 0, GFLAGS),
/* PD_MISC */
- MUX(0, "hdmiphy", mux_hdmiphy_p, CLK_SET_RATE_PARENT,
+ MUX(SCLK_HDMI_PHY, "hdmiphy", mux_hdmiphy_p, CLK_SET_RATE_PARENT,
RK2928_MISC_CON, 13, 1, MFLAGS),
MUX(0, "usb480m_phy", mux_usb480m_phy_p, CLK_SET_RATE_PARENT,
RK2928_MISC_CON, 14, 1, MFLAGS),
--
2.20.1
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